如何在vhdl中使用实数/浮点数 [英] How to use real/floating point numbers in vhdl

问题描述

Can anyone post a vhdl code that shows addition and multiplication of real variables/signals right from usage of libraries, to declaration of signals, to the addition and multiplication code?

or

Can anyone post a vhdl code that shows addition and multiplication of floating point numbers right from usage of libraries, to declaration of signals, to the addition and multiplication code?

我尝试过：



我们已经用谷歌搜索了如何实现浮点数但没有明确答案。

我们尝试过使用包ieee.float_package.all;但是错误消息显示没有这样的包

What I have tried:

We have googled how to implement floating point numbers but there is no clear answer.
We have tried using package ieee.float_package.all; but the error message shows that there is no such package

推荐答案

在你原来的问题中看到我的建议：如何在vhdl中使用float [ ^ ]。

See my suggestion in your original of this question: How to use float in vhdl[^].

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