我需要帮助verilog / vhdl代码来驱动使用fpga的sevomotor。 [英] I need help with a verilog/vhdl code to drive sevomotor using fpga.

问题描述

我正在做一个项目，我正在使用电位计来驱动使用FPGA的伺服电机。电位器的输出将输入atmega16微控制器进行模数转换。转换后，8位数据通过Atmega16微控制器的UART进行无线和串行传输。我完成了项目的这一部分。但我面临下一部分的问题。在下一部分中，我必须开发一个Verilog / VHDL代码，该代码将被转储到FPGA中，该代码将从Atmega16获取串行数据。代码将有时钟模块，它将为UART和伺服电机生成时钟，UART接收器模块用缓冲器和寄存器实现。波特率默认为9600.代码还有一个PWM发生器模块，它将接收由UART接收器模块。我还计划使用Altera DE2 FPGA板。我在这个项目中使用FUTABA S3003伺服电机。我真的需要这个代码的帮助。如果可以的话请帮忙。谢谢。



我尝试了什么：



我生成了时钟模块成功（这不是一个夸耀的成就），我无法做其余的事情。请帮忙，这是一个不起眼的要求。

I'm doing a project in which I'm using a potentiometer to drive servomotor using FPGA. The potentiometer's output will be fed into the atmega16 microcontroller for analog to digital conversion. After conversion the 8 bit data is wirelessly and serially transmitted through the UART of Atmega16 microcontroller. I completed this part of my project. But I'm facing problem with the next part. In the next part I have to develop a Verilog/VHDL code which will be dumped into the FPGA, which will take the serial data from the Atmega16. The code will have clock module which will generate the clock for UART and servomotor,a UART receiver module implemented with buffer and a register.The baud rate is default i.e 9600. The code will also have a PWM generator module which will take data received by the UART receiver module. I'm also planning to use an Altera DE2 FPGA board.I'm using FUTABA S3003 servomotor in this project. I really need help with this code. Please help if you can. Thank you.

What I have tried:

I generated the clock module successfully(which is not an achievement to boast about) and I'm unable to to do the rest. Please help, it's a humble request.

推荐答案

正如理查德所说，我们不是来为你做你的工作。

And碰巧我们这里的FPGA开发人员很少 - 你可能会更好地关注一个经常处理它们的聚焦网站。我们主要是软件，所以请自己尝试Verilog或Altera，看看他们可以推荐的地方。

As Richard says, we're not here to do your work for you.
And as it happens we have very few FPGA developers here - you might be better looking at a more "focussed" website that routinely deals with them. We are primarily software, so try Verilog or Altera themselves and see where they can recommend.

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