跨CPU内核的rdtsc准确性 [英] rdtsc accuracy across CPU cores

问题描述

我正在从一个线程发送网络数据包，并收到在不同CPU内核上运行的第二个线程的答复.我的流程会测量发送与发送之间的时间接收每个数据包(类似于ping).我正在使用rdtsc来获得高分辨率，低开销的时序，这是我的实现所需的.

I am sending network packets from one thread and receiving replies on a 2nd thread that runs on a different CPU core. My process measures the time between send & receive of each packet (similar to ping). I am using rdtsc for getting high-resolution, low-overhead timing, which is needed by my implementation.

所有测量看起来都是可靠的.不过，我一直在担心rdtsc在内核之间的准确性，因为我一直在阅读一些文字，这暗示着tsc在内核之间不同步.

All measurments looks reliable. Still, I am worried about rdtsc accuracy across cores, since I've been reading some texts which implied that tsc is not synced between cores.

我在Wikipedia中找到了有关 TSC的以下信息

I found the following info about TSC in wikipedia

恒定的TSC行为可确保每个时钟滴答的持续时间为 统一并支持使用 TSC作为壁钟计时器，即使 处理器内核会更改频率.这 建筑行为在移动吗 面向所有英特尔处理器.

Constant TSC behavior ensures that the duration of each clock tick is uniform and supports the use of the TSC as a wall clock timer even if the processor core changes frequency. This is the architectural behavior moving forward for all Intel processors.

我仍然担心核心的准确性，这是我的问题

更多信息

• 我在Intel nehalem机器上运行我的进程.
• 操作系统是Linux.
• 为所有内核设置了" constant_tsc " cpu标志.

• I run my process on an Intel nehalem machine.
• Operating System is Linux.
• The "constant_tsc" cpu flag is set for all the cores.

推荐答案

X86_FEATURE_CONSTANT_TSC + X86_FEATURE_NONSTOP_TSC cpuid中的位(edx = x80000007，位#8；请检查

X86_FEATURE_CONSTANT_TSC + X86_FEATURE_NONSTOP_TSC bits in cpuid (edx=x80000007, bit #8; check unsynchronized_tsc function of linux kernel for more checks)

Intel的Designer vol3b，第16.11.1节不变式TSC"中显示以下内容

Intel's Designer's vol3b, section 16.11.1 Invariant TSC it says the following

"16.11.1不变TSC

"16.11.1 Invariant TSC

较新的处理器中的时间戳计数器可能支持一种称为不变TSC的增强功能. CPUID.80000007H:EDX [8]指示处理器对不变TSC的支持.

The time stamp counter in newer processors may support an enhancement, referred to as invariant TSC. Processor's support for invariant TSC is indicated by CPUID.80000007H:EDX[8].

不变的TSC将在所有ACPI P-，C-中以恒定速率运行.和T状态.这是向前发展的体系结构行为.在具有不变TSC支持的处理器上，OS可以将TSC用于壁钟计时器服务(而不是ACPI或HPET计时器). TSC读取效率更高，并且不会产生与环转换或访问平台资源相关的开销."

The invariant TSC will run at a constant rate in all ACPI P-, C-. and T-states. This is the architectural behavior moving forward. On processors with invariant TSC support, the OS may use the TSC for wall clock timer services (instead of ACPI or HPET timers). TSC reads are much more efficient and do not incur the overhead associated with a ring transition or access to a platform resource."

因此，如果TSC可以用于壁钟，则可以保证它们是同步的.

So, if TSC can be used for wallclock, they are guaranteed to be in sync.

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