从命令行传递其他变量以使 [英] Passing additional variables from command line to make

问题描述

我可以将变量作为命令行参数传递给GNU Makefile吗?换句话说，我想传递一些参数，这些参数最终将成为Makefile中的变量.

Can I pass variables to a GNU Makefile as command line arguments? In other words, I want to pass some arguments which will eventually become variables in the Makefile.

推荐答案

您可以通过几种方法从makefile外部设置变量:

You have several options to set up variables from outside your makefile:

• 从环境-每个环境变量都被转换为具有相同名称和值的makefile变量.

• From environment - each environment variable is transformed into a makefile variable with the same name and value.

您可能还希望将-e选项(也称为--environments-override)设置为on，并且您的环境变量将覆盖在makefile中进行的分配(除非这些分配本身使用

You may also want to set -e option (aka --environments-override) on, and your environment variables will override assignments made into makefile (unless these assignments themselves use the override directive . However, it's not recommended, and it's much better and flexible to use ?= assignment (the conditional variable assignment operator, it only has an effect if the variable is not yet defined):

FOO?=default_value_if_not_set_in_environment

请注意，某些变量不是从环境继承的:

Note that certain variables are not inherited from environment:

• MAKE是从脚本名称中获得的
• SHELL是在makefile中设置的，或者默认为/bin/sh(合理值:命令在makefile中指定，并且它们是特定于shell的).

• MAKE is gotten from name of the script
• SHELL is either set within a makefile, or defaults to /bin/sh (rationale: commands are specified within the makefile, and they're shell-specific).

从命令行-make可以将变量分配作为其命令行的一部分，并与目标混合在一起:

From command line - make can take variable assignments as part of his command line, mingled with targets:

make target FOO=bar

但是，除非您使用

But then all assignments to FOO variable within the makefile will be ignored unless you use the override directive in assignment. (The effect is the same as with -e option for environment variables).

从父Make导出-如果从Makefile调用Make，通常不应显式编写如下变量分配:

Exporting from the parent Make - if you call Make from a Makefile, you usually shouldn't explicitly write variable assignments like this:

# Don't do this!
target:
        $(MAKE) -C target CC=$(CC) CFLAGS=$(CFLAGS)

相反，更好的解决方案可能是导出这些变量.导出变量会使它进入每次Shell调用的环境，并且通过这些命令进行的调用会按照上面的指定选择这些环境变量.

Instead, better solution might be to export these variables. Exporting a variable makes it into the environment of every shell invocation, and Make calls from these commands pick these environment variable as specified above.

# Do like this
CFLAGS=-g
export CFLAGS
target:
        $(MAKE) -C target

您还可以使用不带参数的export导出所有变量.

You can also export all variables by using export without arguments.

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