如何在GNU Make中的定义内使用ifeq? [英] How to use ifeq inside of a define in GNU Make?

问题描述

我正在尝试在Makefile中的定义内执行ifeq，但似乎遇到一些错误，我想知道是否丢失了某些东西.我有以下Makefile:

I'm trying to do an ifeq inside of a define within a Makefile, but I seem to be running into some errors, and I'm wondering if I'm missing something. I have the following Makefile:

$(info ---- start ----)
ifeq ("X","Y")
$(info DOES not appear_1)
endif

define TESTDEF
ifeq ("X","Y")
$(info SHOULD not appear)
# $(error DEFINITELY SHOULD not error...)
endif
endef

$(eval $(call TESTDEF, 1,2,3))

我遇到以下错误:

---- start ----
SHOULD not appear
Makefile:14: *** DEFINITELY SHOULD not error....  Stop.

我缺少一些技巧吗?是否可以在ifeq的内部定义? (注意:这在我的本机GNU 3.81 make和我的mips uclibc交叉编译器上都会发生)

Is there some trick that I'm missing? Is it possible to do ifeq's inside define? (note: this happens on both my native GNU 3.81 make, and on my mips uclibc cross-compiler)

推荐答案

call此函数时，Make使用提供的任何参数(在此情况下不相关)评估定义.因此，如果定义中包含$(info ...)或$(error ...)之类的内容，甚至在注释中包含 ，Make都会对其进行评估，然后您将看到结果(请参见

When you call this function, Make evaluates the definition, using whatever parameters you provide (irrelevant in this case). So if the definition includes something like $(info ...) or $(error ...), even in a comment, Make will evaluate it and you'll see the result (see documentation; I've tested it in GNUMake 3.81).

要获得所需的行为，请添加几个美元符号:

To get the behavior you want, add a couple of dollar signs:

define TESTDEF
ifeq ("X","Y")
$$(info SHALL not appear)
# $$(info DEFINITELY SHALL not error...)
endif
endef

$(eval $(call TESTDEF))

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