在Makefile中的先决条件列表中使用目标的目录路径 [英] Use directory path of target in list of prerequisites in Makefile

问题描述

我编写了一个脚本，该脚本接收两个以.cfg结尾的文件，并输出一个以.cmp结尾的文件.我想将其包含在我的Makefile中，因为一些源代码文件依赖于此.cmp文件.

I wrote a script that takes in two files ending in .cfg and outputs a file ending in .cmp. I want to include this in my Makefile because a few source code files depend on this .cmp file.

在我的Makefile中，我想这样做:

In my Makefile, I want to do this:

%.cmp: %.cfg $(dir %)/default.cfg
    ./compare.pl $^ $@

有两个依赖项来生成.cmp文件.第一个是同名的.cfg文件，第二个是始终为 名为default的.cfg文件. .cfg文件和输出.cmp文件将位于同一目录中.

There are two dependencies to generate the .cmp file. First is a .cfg file with the same name, and second is a .cfg file which is always named default. Both .cfg files and the output .cmp file will be in the same directory.

有没有办法获取目标的目录路径并将其与prereqs一起使用?

Is there a way to grab the directory path of the target and use it with the prereqs?

推荐答案

我猜还请注意，在$$(dir %)之后没有斜杠，dir函数始终在结果值后加一个.

Also note the absence of slash after $$(dir %), dir function always append one to the resulting value.

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