如何使用Makefile运行回归 [英] How to run regression using makefile
问题描述
我有tcsh shell.我想编译一次VCS
,然后使用SIMV
运行多个测试用例.先前将单项测试VCS = vcs -sverilog -timescale=1ns/1ps \ +acc +vpi ..
和SIMV = ./simv +UVM_VERBOSITY=$(UVM_VERBOSITY) +UVM_TESTNAME=$(TESTNAME) ${vcs_waves_cmd} -l $(TESTNAME).log
定义为常量.
I have tcsh shell. I want to compile once which is VCS
and then run multiple testcases using SIMV
. Earlier for single test VCS = vcs -sverilog -timescale=1ns/1ps \ +acc +vpi ..
and SIMV = ./simv +UVM_VERBOSITY=$(UVM_VERBOSITY) +UVM_TESTNAME=$(TESTNAME) ${vcs_waves_cmd} -l $(TESTNAME).log
were defined as constants.
我必须通过在数组上循环来替换$(TESTNAME).我尝试通过以下方式切换到bash,但最终会导致其他故障,例如make clean
无法正常工作.
I have to replace $(TESTNAME) by looping on an array.I tried as below by switching to bash but ultimately it is causing other failures such as make clean
not working.
TESTS = ext_reg_write_read reg_write_read
regress: $(TESTS)
$(VCS)\
for t in $(TESTS); do\
./simv +UVM_VERBOSITY=$(UVM_VERBOSITY) +UVM_TESTNAME=$$t ${vcs_waves_cmd} -l $$t.log;\
done
我也想添加导出外壳命令export SHELL = /bin/csh -f
Also I would like to add export shell command export SHELL = /bin/csh -f
我的问题类似于以下内容-实施"make check"或"make test"
My question is similar to following – Implementing `make check` or `make test`
我用过@J. C. Salomon编写此代码的答案
I have used @J. C. Salomon 's answer to make this code
推荐答案
问题出在我要更改为export SHELL = /bin/bash -f
的export SHELL = /bin/csh -f
上.
The problem is with export SHELL = /bin/csh -f
which I was changing to export SHELL = /bin/bash -f
.
But finally SHELL := /bin/bash
works as answered in How can I use Bash syntax in Makefile targets? by @derobert
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