用另一个makefile包裹GNU makefile [英] Wrapping GNU makefile with another makefile
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问题描述
这是在问题之后.
我有Makefile.real
(来自上一个问题的Makefile
):
I have Makefile.real
(Makefile
from prev question):
all: a b
a:
echo a
exit 1
b:
echo b start
sleep 1
echo b end
现在我想创建Makefile
,它是Makefile.real
的简单包装:
Now I want to create Makefile
that is simple wrap of Makefile.real
:
- 它使用
Makefile.real
调用make
并具有与被调用相同的参数 - 它应该显示错误消息ID
Makefile.real
失败 这是我的目标-在并行make末尾显示错误消息 (请参阅问题)
- It calls
make
withMakefile.real
with the same args as it was called - It should print error message id
Makefile.real
fails This is my goal - print error message in the end of parallel make (see question)
因此以下命令应以错误消息终止:
Therefore following commands should terminate with error message:
make -j1 a b (1)
make -j2 a b (2)
我怀疑Makefile
应该接近:
%:
$(MAKE) -f Makefile.real $(MAKECMDGOALS); \
res=$$?; if [ $$res != 0 ]; then echo "Failed!!!"; fi; exit $$res
问题是目标'%'对于a
和b
对于(2)都会被调用两次.
The problem is that target '%' will be called twice for a
and b
for (2).
有什么想法吗?
推荐答案
这是我最后的解决方法
ifneq ($(REAL_MAKE),1)
# run_make will be called once (it's .PHONY target),
# even if make is called with several targets
%: run_make
@:
.PHONY: run_make
run_make:
$(MAKE) $(MAKECMDGOALS) REAL_MAKE=1; \
if [ $$? -ne 0 ]; then \
echo "*** Error ***" >&2; \
exit 1; \
fi
else # REAL_MAKE defined (actual makefile)
### HERE comes original make we want to wrap ###
endif # # REAL_MAKE defined (actual makefile)
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