中断屏蔽:为什么? [英] Interrupt masking: why?

问题描述

我正在阅读中断.可以通过特殊的中断屏蔽挂起非紧急中断.这称为中断屏蔽.我不知道是什么时候/为什么要或需要暂时挂起中断?可能是信号量，还是在多处理器环境中编程?

I was reading up on interrupts. It is possible to suspend non-critical interrupts via a special interrupt mask. This is called interrupt masking. What i dont know is when/why you might want to or need to temporarily suspend interrupts? Possibly Semaphores, or programming in a multi-processor environment?

推荐答案

操作系统准备运行自己的让世界编排"代码时会执行此操作.

The OS does that when it prepares to run its own "let's orchestrate the world" code.

例如，在某些时候OS线程调度程序可以控制.它在允许线程运行之前准备处理器寄存器以及需要完成的所有其他操作，以便为该进程和线程建立环境.然后，在让该线程运行之前，它设置了一个计时器中断，该中断要在它打算让该线程在CPU上使用的时间过后引发.

For example, at some point the OS thread scheduler has control. It prepares the processor registers and everything else that needs to be done before it lets a thread run so that the environment for that process and thread is set up. Then, before letting that thread run, it sets a timer interrupt to be raised after the time it intends to let the thread have on the CPU elapses.

在该时间段(量子)过去之后，将引发中断，并且OS调度程序将再次控制.它必须弄清楚下一步需要做什么.为此，它需要保存CPU寄存器的状态，以便知道如何消除执行代码的副作用.如果在保存状态时出于任何原因(例如，某些异步I/O完成)引发了另一个中断，这将使OS处于其世界不是有效状态的状态(实际上) ，保存状态必须是原子操作.

After that time period (quantum) has elapsed, the interrupt is raised and the OS scheduler takes control again. It has to figure out what needs to be done next. To do that, it needs to save the state of the CPU registers so that it knows how to undo the side effects of the code it executes. If another interrupt is raised for any reason (e.g. some async I/O completes) while state is being saved, this would leave the OS in a situation where its world is not in a valid state (in effect, saving the state needs to be an atomic operation).

为避免陷入这种情况，因此OS内核会在执行任何此类需要原子操作的操作时禁用中断.完成所需的操作后，系统再次处于已知状态，它将重新启用中断.

To avoid being caught in that situation, the OS kernel therefore disables interrupts while any such operations that need to be atomic are performed. After it has done whatever needs doing and the system is in a known state again, it reenables interrupts.

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