从内核模式返回到用户模式 [英] Returning from kernel mode to user mode

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问题描述

我对Unix内核中的模式切换的理解有些困惑.我在这里提供我的理解,并打开以进行讨论/更正.

I'm a bit confused about the understanding of a mode switch in Unix kernel. I give my understanding here and open it for discussion/correction.

从用户模式转换到内核模式时,处理器在每个进程用户堆栈和每个进程内核堆栈之间进行切换.然后,每个进程用户堆栈段选择器和堆栈指针存储在内核堆栈中,然后eip指令指针(用户模式下的返回地址)和其他硬件寄存器被压入内核堆栈

While transitioning from user mode to kernel mode, the processor makes a switch between the per-process-user-stack and the per-process-kernel-stack. Then the user-per-process stack segment selector and stack pointer is stored in the kernel stack and then the eip instruction pointer (return address at user mode) and other hardware registers are pushed on to the kernel stack

当内核必须返回用户模式时,trapret代码会将存储在内核堆栈中的所有值弹出回到硬件寄存器.

When the kernel has to return to user mode, the trapret code pops all values stored in the kernel stack back to the hardware registers.

但是,当iret从内核堆栈弹出eip时,下一条应该执行的指令是用户模式下的返回地址.

But when iret pops eip from the kernel stack, the next instruction that should get executed is the return address in user mode.

发生这种情况时并没有完全弹出内核堆栈的其他值.

This happens without completely popping the other values of the kernel stack.

如何恢复其余的值(%cs, %eflags, %esp, %ss)?

How do the rest of the values (%cs, %eflags, %esp, %ss) get restored ?

内核堆栈中存在的用户堆栈指针如何弹出回%esp?

How is the user-stack-pointer present in kernel stack popped back to %esp ?

推荐答案

iret还原所有内容

iret指令非常复杂.引用 Intel体系结构手册:

iret restores all that stuff

The iret instruction is quite complex. To quote the Intel architecture manual:

当从中断或异常处理程序以不同于被中断过程的特权级别执行返回时,处理器将执行以下操作:

When executing a return from an interrupt or exception handler from a different privilege level than the interrupted procedure, the processor performs these actions:

  1. 执行特权检查.
  2. 将CS和EIP寄存器恢复为中断之前的值,或者 例外.
  3. 恢复EFLAGS寄存器.
  4. 在中断或中断之前将SS和ESP寄存器恢复为其值 异常,导致堆栈切换回中断的堆栈 程序.
  5. 恢复被中断过程的执行.
  1. Performs a privilege check.
  2. Restores the CS and EIP registers to their values prior to the interrupt or exception.
  3. Restores the EFLAGS register.
  4. Restores the SS and ESP registers to their values prior to the interrupt or exception, resulting in a stack switch back to the stack of the interrupted procedure.
  5. Resumes execution of the interrupted procedure.

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