关于[基础+索引*比例+分配]的几个问题 [英] A couple of questions about [base + index*scale + disp]

问题描述

Intel和AT& T语法中内存寻址的一般形式如下：

  [base + index * scale +显示] 
显示（基数，索引，比例）
  

我的问题如下：

• 可以基本和索引是任何寄存器吗？


• scale 可以取什么值，分别是1、2、4和8（其中1是


• 索引和 disp 是否可互换（唯一的区别是是 index 是寄存器，而 disp 是立即值）？

解决方案

在英特尔手册中对此进行了描述：

3.7.5指定偏移量

内存地址的偏移量部分可以直接指定为静态值（称为位移），也可以通过
指定一个地址由以下一个或多个co组成的计算要素：

• 位移-8位，16位或32位值。


• 基数-通用寄存器中的值。


• 索引-通用寄存器中的值目的寄存器。 [不能是ESP / RSP]


• 比例因子-2、4或8的值乘以索引值。
>

通过添加这些组件而导致的偏移称为有效地址。

比例因子编码为2位移位计数（0,1,2,3），比例因子为1、2、4或8。是的，如果您写（％edi，％， * 1 （移位计数= 0）是默认值edx）;相当于（％edi，％edx，1）

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16位位移只能在16位寻址模式下编码，该寻址模式使用不包含比例因子的不同格式，并且只能选择哪些寄存器可以作为基址或索引。因此，像 1234（％edx）这样的模式必须将1234符号扩展为32位的 disp32

<-> -128的字节偏移。+127可以使用简短的8位编码。

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所有这些都是相同的，您的汇编程序将使用最短的有效位移编码为您解决。在64位模式下为64位寻址模式。

The general form for memory addressing in Intel and AT&T Syntax is the following:

[base + index*scale + disp]
disp(base, index, scale)

My questions are the following:

• Can base and index be any register?
• What values can scale take, is it 1, 2, 4 and 8 (with 1 being the default)?
• Are index and disp interchangeable (with the only difference being that index is a register while disp is an immediate value)?

解决方案

This is described in Intel's manual:

3.7.5 Specifying an Offset
The offset part of a memory address can be specified directly as a static value (called a displacement) or through an address computation made up of one or more of the following components:

• Displacement — An 8-, 16-, or 32-bit value.
• Base — The value in a general-purpose register.
• Index — The value in a general-purpose register. [can't be ESP/RSP]
• Scale factor — A value of 2, 4, or 8 that is multiplied by the index value.

The offset which results from adding these components is called an effective address.

The scale-factor is encoded as a 2-bit shift count (0,1,2,3), for scale factors of 1, 2, 4, or 8. And yes, *1 (shift count = 0) is the default if you write (%edi, %edx); that's equivalent to (%edi, %edx, 1)

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A 16-bit displacement is only encodeable in a 16-bit addressing mode, which uses a different format that can't include a scale factor, and has a very limited selection of which registers can be a base or index. So a mode like 1234(%edx) would have to sign-extend the 1234 to a 32-bit disp32 in the machine code.

Byte offsets from -128 .. +127 can use a short-form 8-bit encoding. Your assembler will take care of this for you, using the shortest valid encoding for the displacement.

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All of this is identical in 64-bit mode for 64-bit addressing modes.

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