在CUDA中,什么是内存合并,如何实现? [英] In CUDA, what is memory coalescing, and how is it achieved?

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问题描述

什么是CUDA全局内存事务中的合并"?即使阅读了CUDA指南,我也听不懂.怎么做?在CUDA编程指南矩阵示例中,逐行访问矩阵称为"coalesced"或col .. by col ..称为结盟? 哪个是正确的,为什么?

What is "coalesced" in CUDA global memory transaction? I couldn't understand even after going through my CUDA guide. How to do it? In CUDA programming guide matrix example, accessing the matrix row by row is called "coalesced" or col.. by col.. is called coalesced? Which is correct and why?

推荐答案

该信息可能仅适用于计算能力1.x或cuda 2.0.较新的体系结构和cuda 3.0具有更复杂的全局内存访问,实际上,这些芯片甚至都没有分析成组的全局负载".

此外,此逻辑可以应用于共享内存,以避免存储区冲突.

合并内存事务是其中半warp中的所有线程同时访问全局内存的事务.这太简单了,但是正确的方法是让连续的线程访问连续的内存地址.

A coalesced memory transaction is one in which all of the threads in a half-warp access global memory at the same time. This is oversimple, but the correct way to do it is just have consecutive threads access consecutive memory addresses.

因此,如果线程0、1、2和3读取全局内存0x0、0x4、0x8和0xc,则应该是合并读取.

So, if threads 0, 1, 2, and 3 read global memory 0x0, 0x4, 0x8, and 0xc, it should be a coalesced read.

在矩阵示例中,请记住,您希望矩阵线性地驻留在内存中.您可以根据需要执行此操作,并且对内存的访问应反映矩阵的布局方式.因此,下面的3x4矩阵

In a matrix example, keep in mind that you want your matrix to reside linearly in memory. You can do this however you want, and your memory access should reflect how your matrix is laid out. So, the 3x4 matrix below

0 1 2 3
4 5 6 7
8 9 a b

可以这样一行一行地完成,以便(r,c)映射到内存(r * 4 + c)

could be done row after row, like this, so that (r,c) maps to memory (r*4 + c)

0 1 2 3 4 5 6 7 8 9 a b

假设您需要访问一次element,并说您有四个线程.哪些线程将用于哪个元素?可能是

Suppose you need to access element once, and say you have four threads. Which threads will be used for which element? Probably either

thread 0:  0, 1, 2
thread 1:  3, 4, 5
thread 2:  6, 7, 8
thread 3:  9, a, b

thread 0:  0, 4, 8
thread 1:  1, 5, 9
thread 2:  2, 6, a
thread 3:  3, 7, b

哪个更好?哪些将导致合并的读取,而哪些将不会?

Which is better? Which will result in coalesced reads, and which will not?

无论哪种方式,每个线程都会进行三个访问.让我们看一下第一次访问,看看线程是否连续访问内存.在第一个选项中,第一个访问是0、3、6、9.不连续,也不合并.第二个选项是0、1、2、3.合并!是的!

Either way, each thread makes three accesses. Let's look at the first access and see if the threads access memory consecutively. In the first option, the first access is 0, 3, 6, 9. Not consecutive, not coalesced. The second option, it's 0, 1, 2, 3. Consecutive! Coalesced! Yay!

最好的方法可能是编写您的内核,然后对其进行概要分析,以查看您是否拥有未分担的全局装载和存储.

The best way is probably to write your kernel and then profile it to see if you have non-coalesced global loads and stores.

这篇关于在CUDA中,什么是内存合并,如何实现?的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

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