堆栈宽度是否始终与CPU寄存器大小相同？ [英] Is the stack width always same as CPU register size?

问题描述

例如，对于8位CPU，堆栈大小应为8位宽，而16位CPU则为16位堆栈宽度，而32位，64位CPU等。 。

解决方案

CPU具有数据总线和地址总线。它们可以具有相同的宽度，但通常不是。

堆栈指针是指向内存的指针，因此它的宽度通常和地址总线一样宽，除非存在是内部使用的某些（奇怪/晦涩）转换。指令指针（指向当前指令）也是指向内存的指针，如堆栈指针一样宽。

其他寄存器主要处理数据，并且它们具有与数据总线相同的尺寸。但是像往常一样，也有例外。

举个老例子。 6502。一个8位cpu（8位数据总线，16位地址总线）。它具有（或多或少）通用寄存器X和Y，以及称为A的累加器。所有8位寄存器。有一个堆栈指针和一个指令指针，该堆栈指针具有8个显式位和8个隐式位（堆栈始终位于相同的256字节区域中），因此堆栈指针寄存器具有8位，指令指针具有16位。 / p>

8086具有16位数据总线和20位地址总线。通用寄存器在哪里8（和16位）。指令指针和堆栈指针位于16位，但使用段寄存器（也为16位）来获取完整的20位地址。

For example, for a 8-bit CPU, the stack size is expected to be 8-bit wide, and 16-bit CPU vs 16-bit stack width, and 32-bit, 64-bit CPU, and so on. Is it true for all architectures?

解决方案

A CPU has a data bus and a address bus. They can have the same width, but they often aren't.

The stack pointer is a pointer to memory, so its often as wide as the address bus, unless there is some (weird/obscure) conversion used internally. The instruction pointer (points to the current instruction) is also a pointer to memory and as such as wide as the stack pointer.

Other registers mostly deal with data, and as such have the same dimensions as the data bus. But as usual, there are exceptions.

To take an old example. The 6502. A 8 bit cpu (8 bit databus, 16 bit addressbus). It has the (more or less) general purpose registers X and Y, and the "accumulator" called A. All 8 bit registers. There is a stack pointer and a instruction pointer, the stack pointer having 8 explicit and 8 implicit bits (stack is always in the same 256-byte region) and thus the stack pointer register having 8 bits, the instruction pointer having 16 bits.

The 8086, has an 16 bit databus and a 20 bit addressbus. The general registers where 8 (and 16 bit). The instruction pointer and stackpointer where 16 bit, but used segment registers (also 16 bit) to get the full 20 bit address.

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