无法在内核模块makefile中使用通配符 [英] Cannot use wildcard in kernel module makefile

问题描述

我对Makefile和内核模块非常熟悉，但是最近我的Makefile中出现了一个毫无意义的问题-使用通配符. 为了证明这一点，我从头开始编写一个hello world内核模块. 目录结构是这样的:

I am pretty familiar with Makefiles and kernel modules, but recently I got a problem in my Makefile that doesn't make any sense -- on using wildcards. To demonstrate this, I am compiling a hello world kernel module from scratch. The directory structure is like this:

hello_mod/
   | 
   --- hello.c
   |
   --- Makefile

这是实际的makefile:

Here is the actual makefile :

CFILES := $(wildcard hello.c*)
#CFILES := hello.c
OBJS := $(CFILES:.c=.o)

KSRC := /lib/modules/$(shell uname -r)/build

obj-m += hello_world.o
hello_world-y := $(OBJS)

all:    
        @echo $(CFILES)
        $(MAKE) -C $(KSRC) M=$$PWD modules

clean:
        $(MAKE) -C $(KSRC) M=$$PWD clean

.PHONY: clean

问题是，即使注释的$(CFILES)和未注释的$(CFILES)完全相同，构建也会在使用第一个$(CFILES)时失败，并出现以下错误:

The problem is that even though the commented $(CFILES) and the uncommented $(CFILES) are exactly the same, the build fails on using the first $(CFILES) with the following error:

*** No rule to make target `/home/test/hello_mod/hello_world.c', needed by
/home/test/hello_mod/hello_world.o'.  Stop.

如果使用带注释的$(CFILES)，则效果很好.

If the commented $(CFILES) is used, it works perfectly.

如果有人想对此进行测试，我将包括hello.c的hello world源代码:

If someone wants to test this out, I'm including the source for the hello world source which is hello.c :

#include <linux/kernel.h>
#include <linux/module.h>

static int mod_init()
{
        printk("Hello\n");
        return 0;
}

static void mod_exit()
{
        printk("Bye world\n");    
}

module_init(mod_init);
module_exit(mod_exit);

有人知道它为什么这样吗?而且我需要在makefile中使用通配符.任何帮助将不胜感激.

Does anyone know why it is behaving as such? And I need to use wildcards in the makefile. Any help will be appreciated.

推荐答案

这里发生了两种情况.第一个实际上仅依赖于KSRC变量和递归make调用.第二个make只需要CFILES，OBJS，obj-m和hello_world-y变量，而不使用all:目标.因此，您的调试显示未为第一个Make使用CFILES的位置已正确设置，而在第二个Make仍未使用的位置不显示CFILES.

There are two makes happening here. The first really only relies on the KSRC variable and the recursive make call. The second make only needs the CFILES, OBJS, obj-m, and hello_world-y variables, and doesn't make use of the all: target. So your debug is showing that CFILES is set correctly for the first Make, where it's not being used, and is not showing it in the second make, where it is.

您是从其他目录扩展通配符，而不是选择正确的文件.尝试使用CFILES:

You're wildcard expanding from a different directory, and not picking up the right files. Try this for CFILES:

CFILES := $(notdir $(wildcard $M/hello.c*))

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