在执行指令和读/写数据时,x86如何处理字节和字寻址? [英] How does x86 handle byte vs word addressing when executing instructions and reading/writing data?

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问题描述

因此,我正在学习x86的工作原理,并遇到人们说x86是字节可寻址的,但可以读取单词,双精度单词等.处理器如何决定何时使用哪种方法?例如.用于访问下一条指令以及当用户想要对存储器进行读/写操作时,使用哪种寻址模式?

So I am learning how x86 works and have come across people saying that it is byte-addressable, yet can read words, double words, etc. How does the processor decide which method to use and when? E.g. for accessing the next instruction and when a user wants to read/write to memory, which addressing mode is used?

推荐答案

每个内存访问都具有由机器代码指令指定的操作数大小.(寻址模式不是正确的术语:不同的寻址模式以不同的方式指定要访问的内存块的最低地址,例如 [rdi] vs. [rdi + rdx * 8] vs. [RIP + rel32] )

Every memory access has an operand-size specified by the machine-code instruction. (Addressing mode isn't the right term: different addressing modes are different ways of specifying the lowest address of the chunk of memory to be accessed, like [rdi] vs. [rdi + rdx*8] vs. [RIP + rel32])

使用前缀(对于整数指令分别为16 vs. 32 vs. 64位)或相同的助记符(8位整数)使用不同的操作码来对不同的操作数大小进行编码.或者带有可以使用xmm,ymm或zmm寄存器的AVX/AVX512指令的VEX或EVEX前缀中的位.

Encoding different operand-sizes is done with prefixes (for 16 vs. 32 vs. 64-bit for integer instructions) or a different opcode for the same mnemonic (8-bit integer). Or with bits in the VEX or EVEX prefix for AVX / AVX512 instructions that can use xmm, ymm, or zmm registers.

解码还取决于当前模式,这意味着默认的操作数大小:32和64位模式为32,而16位模式为16. 66 opererand-size前缀表示相反的大小.

Decoding also depends on the current mode implying the default operand-size: 32 for 32 and 64-bit mode, or 16 for 16-bit mode. A 66 opererand-size prefix implies the opposite size.

在64位模式下,REX前缀中的 .W (宽度)位将操作数大小设置为64位.(还有一些指令,例如 push / pop 默认为64位操作数大小,不需要前缀,但是大多数指令例如 add / sub / mov 仍默认为32位)

In 64-bit mode, the .W (width) bit in the REX prefix sets the operand-size to 64-bit. (And some instructions like push/pop default to 64-bit operand-size with no prefix needed, but most instructions like add/sub/mov still default to 32-bit)

还有一个 0x67 地址大小前缀,用于将寻址模式交换为其他大小.(16 vs. 32或在64位模式下64-> 32.)

There's also a 0x67 address-size prefix which swaps addressing modes to the other size. (16 vs. 32 or in 64-bit mode 64 -> 32.)

例如, mov [rdi],eax 是双字存储,并且机器代码编码将通过在操作码上不对16/32/64位操作数使用特殊前缀来指定-尺寸.(有关可用的编码,请参见 https://www.felixcloutier.com/x86/mov .但是请注意,英特尔手册中没有在每个条目中提到 66 操作数大小的前缀:它具有2个相同的编码,但大小不同.您必须知道哪个需要 66 前缀(基于当前模式的默认值).

For example, mov [rdi], eax is a dword store, and the machine-code encoding will specify that by using no special prefixes on the opcode for 16/32/64-bit operand-size. (see https://www.felixcloutier.com/x86/mov for the available encodings. But note that Intel's manual doesn't mention 66 operand-size prefixes in each entry: it has 2 identical encodings with different sizes. You have to know which one needs a 66 prefix based on the current mode's default.)

16位操作数大小(如 mov [rdi],ax )将具有相同的机器代码,并带有 66 操作数大小前缀.

16-bit operand-size like mov [rdi], ax will have the same machine code by with a 66 operand-size prefix.

8位操作数大小( mov [rdi],al )有自己的操作码,不需要前缀.

8-bit operand-size (mov [rdi], al) has its own opcode, no prefixes needed.

movzx / movsx 是有趣的情况:内存访问大小与目标寄存器不同.内存访问大小(字节或字)由操作码指定.操作数大小前缀仅影响目标大小.x86-64 63/r movsxd (dword-> qword符号扩展名)除外,其中 66 操作数大小前缀 将内存访问大小缩小到 m16 以匹配目标.

movzx / movsx are interesting cases: the memory access size is different from the destination register. The memory-access size (byte or word) is specified by the opcode. Operand-size prefixes only affect the destination size. Except x86-64 63 /r movsxd (dword->qword sign-extension) where a 66 operand-size prefix does shrink the memory-access size down to m16 to match the destination.

类似于SIMD指令;指令编码唯一地确定内存访问大小以及读取或写入的寄存器.

Similarly for SIMD instructions; the instruction encoding uniquely determines the memory-access size, along with the registers read or written.

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