启用外部的ARM CPU上中止 [英] Enabling external aborts on an ARM CPU

问题描述

从的Cortex-R参考手册，^{可能没有的Cortex-R专用}

异步中断不屏蔽

异步中止的性质意味着当处理器正在处理一个不同的中止他们可能会发生。如果一个异步中止产生在这种情况下一个新的异常，在 r14_abt 和 SPSR_abt 值将被覆盖。如果数据推送到存储器堆栈之前出现这种情况，关于第一中止的状态信息将丢失。以prevent这种情况的发生，CPSR中包含一个屏蔽位，在A位，以表明异步中止不能被接受。当A位被设置，出现的任何异步中止被保持由处理器，直到A位未决清零，当异常被实际采取。当采取中止，IRQ或FIQ异常的A-自动置位，并在复位。您只能清除状态信息后中止处理程序中的A-位或者已被堆放到内存中，或不再需要。

The nature of asynchronous aborts means that they can occur while the processor is handling a different abort. If an asynchronous abort generates a new exception in such a situation, the r14_abt and SPSR_abt values are overwritten. If this occurs before the data is pushed to the stack in memory, the state information about the first abort is lost. To prevent this from happening, the CPSR contains a mask bit, the A-bit, to indicate that an asynchronous abort cannot be accepted. When the A-bit is set, any asynchronous abort that occurs is held pending by the processor until the A-bit is cleared, when the exception is actually taken. The A-bit is automatically set when abort, IRQ or FIQ exceptions are taken, and on reset. You must only clear the A-bit in an abort handler after the state information has either been stacked to memory, or is no longer required.

我的问题是，如果我有 A 位屏蔽由于复位我怎么能知道一个的异步中止的挂起？可以挂起外部将中止而不揭露了 A 位，并采取例外被清除？或者更一般地，有一个复位后清零 A 一些建议？

My question is, if I have the A bit masked since reset how can I know if an asynchronous abort is pending? Can pending external aborts be cleared without unmasking the A bit and taking the exception? Or more generally, is there advice on clearing the A bit after a reset?

显然，东西在我的当前引导链有一个挂起的外部中止（但只有在一个硬实力）。我想启用外部中止，但它似乎相当繁琐的特殊情况的首的外部中止的在异常code。

Apparently something in my current boot chain has a pending external abort (but only after a hard power on). I would like to enable the external aborts, but it seems rather cumbersome to special case the first external abort in the exception code.

推荐答案

在实现安全扩展的系统，中断状态寄存器，中断服务程序，可以告诉你，如果有外部中止审理中。可悲的是这并没有太大的帮助，如果你在R4没有实现它们。

On a system that implements the security extensions, the Interrupt Status Register, ISR, can tell you if there's an external abort pending. Sadly this doesn't help much if you're on R4 which doesn't implement them.

否则，没有什么，我可以在体系结构看，以确定或处理采取例外就像你说的中止短。这并没有真正让我感到吃惊 - 总的来说外部有关可以安全地忽略很多的是的一个特例。

Otherwise, there's nothing that I can see in the architecture to identify or deal with an abort short of taking the exception as you say. This doesn't really surprise me - in general an external about that can be safely ignored very much is a special case.

如果在系统中的错误不能被固定（是引导程序错误的顺序，或类似的探测设备？），那么解决办法，但是繁琐，是家常便饭 - 如果有一些相当简单的方式来讲一个冷启动从热复位我能想象一个pretty琐碎的自包含的垫片来处理它，因此主要code永远需要知道。

If the bug in the system can't be fixed (is the bootloader probing devices in the wrong order, or similar?) then a workaround, however cumbersome, is the order of the day - if there's some reasonably straightforward way to tell a cold boot from a warm reset I can imagine a pretty trivial self-contained shim to handle it so the main code never needs to know.

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