第2阶段MemAttr长描述ARM PTE查询 [英] Stage 2 MemAttr Long Descriptor ARM PTE query
问题描述
有关第2阶段的翻译,有较低的属性称为MemAttr一个字段[3:0]
详尽地列举所有可能值给出如下表
For Stage 2 Translation, there is a field in lower attributes called MemAttr[3:0] Exhaustively enumerating its all possible values gives the following table
/* All Possible Values of MemAttr for Stage 2 */
/*
* 0000 Region is Strongly Ordered
* 0001 Device Memory [ONC by Default]
* 0010 XXXXX
* 0011 XXXXX
* 0100 XXXXX
* 0101 Normal Memory O NC, I NC
* 0110 Normal Memory O NC, I WT C
* 0111 Normal Memory O NC, I WB C
* 0100 XXXXX
* 1001 Normal Memory O WT C, I NC
* 1010 Normal Memory O WT C, I WT C
* 1011 Normal Memory O WT C, I WB C
* 1100 XXXXX
* 1101 Normal Memory O WB C, I NC
* 1110 Normal Memory O WB C, I WT C
* 1111 Normal Memory O WB C, I WB C
*/
0 - 外
我 - 内蒙古
WB-回写
WT-直写
NC - 非可缓存
C - 可缓存
O - Outer I - Inner WB- WriteBack WT- WriteThrough NC - Non Cacheable C - Cacheable.
现在我想知道分配给来宾正常记忆,应该是什么我应该把在纪念品ATTR的值。我只是在寻找回写缓存。
Now I am wondering for normal memory assigned to guest, what should be the values I should put in mem attr. I am only looking for WriteBack Cacheable.
推荐答案
正常,回写缓存是你想要的任何通用RAM映射。除非你正在做一些非常特别的,你想,无论对于内部和外部缓存。
Normal, write-back cacheable is what you want for any general-purpose RAM mappings. Unless you're doing something very special, you want that for both inner and outer caches.
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