如何使用 chisel3 blackboxes 实例化 Xilinx 差分时钟缓冲器? [英] How to instanciate Xilinx differential clock buffer with chisel3 blackboxes?

问题描述

我想在我的 AC701 套件 (artix7).但要做到这一点，我必须实例化一个时钟输入差分缓冲器.Xilinx 提供了以下 verilog 模板来做到这一点:

I want to write a simple chisel3 blinking led design on my AC701 kit (artix7). But to do that I have to instantiate a clock input differential buffer. Xilinx give the following verilog template to do that :

IBUFDS #(
    .DIFF_TERM("TRUE"),
    .IOSTANDARD("DEFAULT")
) IBUFDS1_inst (
    .O(clock1), // Clock buffer
    .I(clock1_p), // Diff_p clock
    .IB(clock1_n) // Diff_n clock
);

我阅读了 chisel 文档，我必须使用«blackbox» 类来实例化它.但我做不到.我试过这个:

I read on chisel documentation that I have to use «blackbox» class to instantiate it. But I can't do it. I tried this :

class IbufdsParam extends VerilogParameters {
    val DIFF_TERM  = "TRUE" 
    val IOSTANDARD = "DEFAULT"
}

class IBUFDS extends BlackBox {
  val params = new IbufdsParam()
  val io = IO(new Bundle {
    val O = Output(Bool())
    val I = Input(Bool())
    val IB = Input(Bool())})
  io.O.setName("O")
  io.I.setName("I")
  io.IB.setName("IB")

  /* For simulation */
  io.O := io.I & ~io.IB
}

但似乎chisel3不知道VerilogParameters类:

But it seem that chisel3 doesn't know VerilogParameters class :

[error] blinking_led/blink.scala:5: not found: type VerilogParameters
[error] class IbufdsParam extends VerilogParameters {

而且我不知道怎么说不要使用时钟并使用此模块重置".

And I don't know how to say «do not use clock and reset with this module».

一旦正确声明了这个黑盒，我就必须将输出时钟 ('O') 连接到闪烁模块的主时钟.我不确定如何做到这一点.我在考虑:

Once this blackbox correctly declared, I will have to connect the output clock ('O') to the main clock of my blinking module. I'm not sure about how to do that. I'm thinking about that :

class Blink extends Module {
  val io = IO(new Bundle {
    val clock_p = Input(Bool())
    val clock_n = Input(Bool())
    val led  = Output(Bool())
  })

  val ibufds = IBUFDS()

  Driver.implicitClock := ibufds.io.O
  ibufds.io.I := io.clock_p
  ibufds.io.IB:= io.clock_n

...
}

但我认为这可能不是正确的方式，不是吗?

But I think it's maybe not the right way, isn't it ?

推荐答案

这是一个文档失败，我一定会在 chisel3 wiki 用于参数化黑盒.参数化黑盒目前是 Chisel3 的任何实验性功能，可以通过将字符串映射传递给字符串或 Ints 或 Longs 给 BlackBox 构造函数来使用.因此，对于您的特定情况，请尝试:

This is a documentation failure, I'll be sure to add a page on the chisel3 wiki for parameterized blackboxes shortly. Parameterized blackboxes are currently any experimental feature of Chisel3 that can be used by passing a Map of String to Strings or Ints or Longs to the BlackBox constructor. Thus for your particular case, try:

import chisel3._
import chisel3.experimental._

class IBUFDS extends BlackBox(Map("DIFF_TERM" -> "TRUE",
                                  "IOSTANDARD" -> "DEFAULT")) {
  val io = IO(new Bundle {
    val O = Output(Clock())
    val I = Input(Clock())
    val IB = Input(Clock())
  })
}

在 chisel3 中，BlackBoxes 没有隐式时钟或重置，端口也不能重命名，而是获得 io Bundle 中给出的名称(不添加任何 io_).目前也不支持仿真行为，但您可以提供 Verilog 实现并使用 Verilator 仿真您的整个设计.

In chisel3, there is no implicit clock or reset for BlackBoxes, ports also can't be renamed but will instead get the name given in the io Bundle (without any io_ added). Simulation behavior is also not currently supported, but you can provide a Verilog implementation and simulate your whole design with Verilator.

现在，我们要使用 IBUFDS 的 O 输出并将其连接到某个 Blink 模块.您不能使用子模块来覆盖其父模块的时钟，但可以设置子模块的时钟.因此，我可以提供一些 Top 模块来实例化 IBUFDS 和 Blink，例如.

Now, we want to use the O output of IBUFDS and connect it to some Blink Module. You cannot use a submodule to overrule the clock of its parent, but you can set the clock of a submodule. Thus, I can provide some Top Module that instantiates both IBUFDS and Blink, eg.

class Blink extends Module {
  val io = IO(new Bundle {
    val led = Output(Bool())
  })
  val reg = Reg(init = false.B)
  reg := !reg
  io.led := reg
}

class Top extends Module {
  val io = IO(new Bundle {
    val clock_p = Input(Clock())
    val clock_n = Input(Clock())
    val led  = Output(Bool())
  })

  val ibufds = Module(new IBUFDS)
  ibufds.io.I := io.clock_p
  ibufds.io.IB:= io.clock_n

  val blink = Module(new Blink)
  blink.clock := ibufds.io.O
  io.led := blink.io.led   
}

这段代码导致IBUFDS被实例化如下:

This code leads to IBUFDS being instantiated as follows:

IBUFDS #(.DIFF_TERM("TRUE"), .IOSTANDARD("DEFAULT")) ibufds (
  .IB(ibufds_IB),
  .I(ibufds_I),
  .O(ibufds_O)
);

我认为应该做你想做的！

which I believe should do what you want!

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