7段显示器上十进制数 [英] Decimal number on 7 segment display

问题描述

我已经得到了用VHDL一个项目一个大问题。我希望看到7段显示了许多用户设置与开关。例如，如果低序5开关导通，然后它们将重新present二进制数11111就是十进制31。所以，我想看看31 7段显示器上。

I've got a big problem with VHDL for a project. I want to see on 7 segment display a number that user sets with switches. For example if the low-order 5 switches are turned on then they will represent the binary number "11111" that is 31 in decimal. So I want to see 31 on 7 segment display.

要做到这一点，我计划下列步骤操作：

To do that I plan these steps:

• 将值5开关到一个数组


• 数组转换成整数


• 查看整数到7段显示器

1点）插入到一个数组

Point 1) insert into an array

     signal first: std_logic_vector (0 to 4);
     signal temp: integer range 0 to 9999:=0;
     for i in 0 to 4 loop
           first(i)<=SW(i);
     end loop;
     temp<=VEC_TOINT(first);
     HEX0<=INT_TO7SEG(temp);

2点）矢量为整型

Point 2) Vector to Integer

     Function VEC_TOINT(Vector: in std_logic_vector) return integer is
     variable temp: bit_vector(Vector'range);
     variable result: integer :=0;
     Begin
          for index in Vector'range loop
               result:=result * 2 + bit'pos(temp(index));
          end loop;
          if Vector(Vector'left) = '1' then 
               result:=(-result)-1;
          end if;
          return result;
     End VEC_TOINT;

有关此刻的第三点，我没有任何想法。

For the third point at the moment I don't have any idea.

推荐答案

我写了一个小包裹，你想要做什么。给定一个无符号的输入值，它打破了这个值成一系列的小数位数，并生成可驱动任意数量的七段显示器的信号。

I've written a small package that does what you want. Given an unsigned input value, it breaks down this value into a series of decimal digits, and generates signals that can drive any number of seven-segments displays.

下面是你如何使用它的例子：

Here's an example of how you'd use it:

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.seven_segment_pkg.all;

entity switches_to_7seg_displays is
    port (
        switches: in std_logic_vector(4 downto 0);
        seven_segments_display_1: out std_logic_vector(6 downto 0);
        seven_segments_display_2: out std_logic_vector(6 downto 0)
    );
end entity switches_to_7seg_displays;

architecture behavior of switches_to_7seg_displays is
    signal segments: std_logic_vector(13 downto 0);
    signal input: integer;
begin

    input <= to_integer(unsigned(switches));

    segments <= unsigned_to_seven_segment(
        value => unsigned(switches),
        number_of_digits => 2,
        value_is_bcd => false          
    );

    seven_segments_display_1 <= segments(13 downto 7);
    seven_segments_display_2 <= segments(6 downto 0);

end;

请注意，输入值是无符号。要转换（实际上，类型转换）的std_logic_vector无符号，只需使用：

Note that the input value is an unsigned. To convert (actually, "type cast") an std_logic_vector to an unsigned, just use:

switches_uns <= unsigned(switches_slv);

如果由于某种原因，你决定从交换机的价值转换为整数，有一个在ieee.numeric_std一个功能，做到这一点。这是一个好主意，用它，而不是写你自己的。你可以使用它作为：

If for some reason you decide to convert the value from the switches to an integer, there's a function in ieee.numeric_std that does that. It's a good idea to use it rather than writing your own. You can use it as:

switches_int <= to_integer(unsigned(switches_slv));

最后，这里的code为包。欢迎您使用或学习它，并拿出自己的解决方案。

Finally, here's the code for the package. You are welcome to use it or study it and come up with your own solution.

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

package seven_segment_pkg is

    -- Return a std_logic_vector ready for driving a number of 7-segment displays.
    function unsigned_to_seven_segment(
        value: unsigned;
        number_of_digits: integer;
        value_is_bcd: boolean
    ) return std_logic_vector;

end;

package body seven_segment_pkg is

    function seven_seg_from_bcd_digit(bcd_digit: std_logic_vector(3 downto 0)) 
        return std_logic_vector 
    is begin
        case bcd_digit is
            --                   abcdefg
            when x"0" => return "0111111";
            when x"1" => return "0000110";
            when x"2" => return "1011011";
            when x"3" => return "1001111";
            when x"4" => return "1100110";
            when x"5" => return "1101101";
            when x"6" => return "1111101";
            when x"7" => return "0000111";
            when x"8" => return "1111111";
            when x"9" => return "1101111";
            when x"a" => return "1110111";
            when x"b" => return "1111100";
            when x"c" => return "0111001";
            when x"d" => return "1011110";
            when x"e" => return "1111001";
            when x"f" => return "1110001";
            when others => return "0000000";
        end case;
    end;

    -- Return a vector ready for driving a series of 7-segment displays.
    function unsigned_to_seven_segment(
        value: unsigned;
        -- Number of 7-segment displays (determines output vector width: W = 7*N)
        number_of_digits: integer;
        -- When true, treat the input value as a BCD number where every 4 bits hold one
        -- digit from 0 to A. When false, treat the input number as an unsigned integer.       
        value_is_bcd: boolean
    ) return std_logic_vector is

        variable segments: std_logic_vector(number_of_digits*7-1 downto 0);
        variable bcd_quotient: unsigned(value'range);
        variable bcd_remainder: unsigned(3 downto 0);
    begin

        if value_is_bcd then
            for i in 0 to number_of_digits-1 loop
                segments(i*7+6 downto i*7) := seven_seg_from_bcd_digit(
                    std_logic_vector(value(i*4+3 downto i*4))
                );
            end loop;
        else
            bcd_quotient := value;
            for i in 0 to number_of_digits-1 loop
                bcd_remainder := resize(bcd_quotient mod 10, 4);
                bcd_quotient := bcd_quotient / 10;
                segments(i*7+6 downto i*7) := seven_seg_from_bcd_digit(
                    std_logic_vector(bcd_remainder)
                );
            end loop;

        end if;

        return segments;
    end;

end;

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