AT&T 语法如何处理其他助记符和操作数大小后缀之间的歧义? [英] What does AT&T syntax do about ambiguity between other mnemonics and operand-size suffixes?

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问题描述

在 AT&T 语法中,指令通常必须以适当的操作数大小作为后缀,q 用于对 64 位操作数进行操作.然而,在 MMX 和 SSE 中也有 movq 指令,q 是原始的 Intel 助记符,而不是额外的后缀.

那么这将如何在 AT&T 中表示?是否需要另一个 q 后缀,如

movqq %mm1, %mm0movqq %xmm1, %xmm0

要不要?

如果还有其他以 AT&T 后缀结尾的指令(例如 padddslld),它们的工作方式是否相同?

解决方案

AT&T 语法基本上不会解决助记符+后缀与其他助记符之间的冲突.注册操作数总是在带有 q 操作数大小后缀的 mov 助记符与 movq 助记符之间消除歧义

movq %xmm0, %xmm0, movq %rax, %xmm0movq %xmm0, %rax 是 3 种不同的操作码都使用相同的助记符(movq 在 Intel 和 AT&T 语法中).

movq 助记符上不允许使用后缀:错误:'movq' 的指令后缀无效.这是正常的,因为在 operand-size 方面不可能有歧义.movq 总是移动 64 位,所以 q 后缀是多余的.

<小时>

这是否会使解析 AT&T 比解析 Intel 语法更难?在 MMX 出现之前(因此也是在 x86-64 之前),movl 仍然是 6 种不同的操作码(英特尔的 insn set ref mov 手册条目列出了所有这些操作码,以及它们的数字操作码):

  • MOV r/m32,r32
  • MOV r32,r/m32(如果两个操作数都是regs,汇编器可以选择任一操作码)
  • MOV r32, imm32(简写)
  • MOV r/m32, imm32(带有 modr/m,可用于内存操作数).
  • 还有 MOV moffs32,EAXMOV EAX,moffs32,作为使用 32 位绝对地址存储/加载的优化(无 ModR/M).

这还不包括进/出段、控制和调试寄存器的移动.就像 movq %xmm0, %rax 一样,AT&T 语法总是不得不处理 mov %ds, %ax.

添加更多具有不同寄存器的表单来消除歧义可能并不难解析.

<小时>

此外,当寄存器决定操作数大小时,操作数大小后缀是可选的.mov %rax, %rcx 是合法的,后缀只用于将立即数移动到内存中.mov $1, (%rsi) 是非法的,因为这两个操作数都没有暗示操作数大小,而且没有后缀明确表示.

In AT&T syntax instructions often have to be suffixed with the appropriate operand size, with q for operations on 64-bit operands. However in MMX and SSE there is also movq instruction, with the q being in the original Intel mnemonic and not an additional suffix.

So how will this be represented in AT&T? Is another q suffix needed like

movqq %mm1, %mm0
movqq %xmm1, %xmm0

or not?

And if there are any other instructions that end like AT&T suffixes (like paddd, slld), do they work the same way?

解决方案

AT&T syntax basically doesn't do anything about conflicts between mnemonic+suffix vs. other mnemonics. Register operands always disambiguate between a mov mnemonic with a q operand-size suffix vs. the movq mnemonic

movq %xmm0, %xmm0, movq %rax, %xmm0, and movq %xmm0, %rax are 3 different opcodes that all use the same mnemonic (movq in both Intel and AT&T syntax).

A suffix is not allowed on the movq mnemonic: Error: invalid instruction suffix for 'movq'. This is normal because there's no possible ambiguity with respect to operand-size. movq always moves 64 bits, so a q suffix would be redundant.


Does this make parsing AT&T harder than parsing Intel syntax? Well before MMX even existed (thus also before x86-64), movl was still the mnemonic for 6 different opcodes (Intel's insn set ref manual entry for mov lists them all, with their numeric opcode):

  • MOV r/m32,r32
  • MOV r32,r/m32 (assembler can choose either opcode if both operands are regs)
  • MOV r32, imm32 (short form)
  • MOV r/m32, imm32 (with a modr/m, usable for memory operands).
  • also MOV moffs32,EAX and MOV EAX,moffs32, as an optimization (no ModR/M) for storing/loading with a 32-bit absolute address.

And that's not counting mov to/from segment, control, and debug registers. Just like with movq %xmm0, %rax, AT&T syntax has always had to deal with mov %ds, %ax.

Adding a few more forms with different registers to disambiguate is probably not much harder to parse.


Besides that, operand-size suffixes are optional when registers determine the operand-size anyway. mov %rax, %rcx is legal, and a suffix is only needed for moving an immediate to memory. mov $1, (%rsi) is illegal because neither operand implies an operand-size, and there's no suffix to make it explicit.

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