always_ff、always_comb、always_latch 和always 之间的区别 [英] Difference among always_ff, always_comb, always_latch and always

问题描述

我完全对这 4 个术语感到困惑:always_ff、always_comb、always_latch 和 always.这些可以如何使用以及用于什么目的?

I am totally confused among these 4 terms: always_ff, always_comb, always_latch and always. How and for what purpose can these be used?

推荐答案

always 是来自 Verilog 的主要进程类型，另一个是 initial 在模拟开始时运行一次.

always is the main type of process from Verilog, the other is an initial which is ran once at the start of a simulation.

always_ff @(posedge clk) :
代表一个触发器(ff)，该过程在时钟的每个上升沿被触发(执行).这替换了 always @(posedge clk).这是唯一应该使用非阻塞 (<=) 赋值的类型，因为它模仿了触发器传输数据的方式.

always_ff @(posedge clk) :
Represents a flip-flop (ff), the process is triggered (executed) on every positive edge of the clock. This replaces always @(posedge clk). This is the only type where non-blocking (<=) assignments should be used, as this mimics the way a flip-flop transfers data.

always_ff @(posedge clk) begin
  a <= b;
end

always_latch :用于表示锁存器.

always_latch : is for representing latches.

用法是:

always_latch begin
  if (enable) begin
     a_latch = something;
  end
  //No else clause so a_latch's value
  //is not always defined, so it holds its value
end

这取代了:

always @* begin
  if (enable) begin
     a_latch = something;
  end
  //No else clause so a_latch's value
  //is not always defined, so it holds its value
end

always_comb:
用于组合逻辑，当您不需要锁存器时，它会替换 always @* .现在我们可以区分我们想要和不想要锁存器的设计意图.

always_comb:
Is for combinatorial logic, it is replacement for always @* when you do not want a latch. Now we can now differentiate our design intent between when we want and do not want latches.

SystemVerilog 名称 always_ff、always_latch 和 always_comb 对何时触发有更严格的标准，这意味着 RTL 有机会达到门级(合成后)失配减少.这确实意味着它们不是 100% 等同于 always @ 计数器部分，并且可能会改变一些模拟行为.

The SystemVerilog names always_ff, always_latch and always_comb have stricter criteria for when they are triggered, this means the chance for RTL to Gate level (post synthesis) mismatch is reduced. It does mean the are not 100% equivalent to there always @ counter part and may change some simulation behaviour.

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