动态更改时钟块时钟极性 [英] Changing clocking block clock polarity on the fly

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问题描述

我正在创建能够切换时钟极性的 UVM VIP.接口中使用时钟块.例如,监视器应根据 UVM 配置使用传入时钟的波边沿或负边沿对数据进行采样 - 这种极性变化可能会即时发生.

I am creating UVM VIP which is able to switch its clock polarity. Clocking block is used in the interface. For example, a monitor should sample the data using posedge or negedge of incoming clock depending on UVM configuration - and this polarity change can happen on the fly.

这可以实现如下:

// In the interface, two clocking blocks are defined
// one for posedge (passive_cb), one for negedge (passive_cbn).

task wait_clock_event();
   if (cfg.pol == 0) @vif.passive_cb;
   else @vif.passive_cbn;
endtask

task sample_data();
  if (cfg.pol == 0) pkt.data = vif.passive_cb.data;
  else pkt.data = vif.passive_cbn.data;
endtask

task run();
  wait_clock_event();
  sample_data();
endtask

这似乎可行,但会浪费代码行并且容易出错.

This seems to work but waste code lines and prone to error.

有没有更好的解决方案?

Is there any better solution?

推荐答案

假设监视器可以独占访问时钟块,您可以考虑使用 iff 限定符修改接口中的时钟事件.

Assuming the monitor has exclusive access to the clocking block, you could consider modifying clocking event in the interface with the iff qualifier.

bit pol;
clocking passive_cb @(posedge clk iff !pol, negedge clk iff pol);
  input data;
endclocking

如果 pol 在与目标时钟极性相同的时间步长变化,则存在潜在的竞争条件.

There is a potential race condition if pol changes in the same timestep as the target clock polarity.

然后您的监视器代码将包含一组函数,其他任务可以简化为我们只有一个时钟块.

Your monitor code would then include a set function and other tasks can be simplified to us only one clocking block.

function void set_vifcb_pol();
  vif.pol = cfg.pol;
endfunction

task wait_clock_event();
  @vif.passive_cb;
endtask

task sample_data();
  pkt.data = vif.passive_cb.data;
endtask

task run();
  set_vifcb_pol();
  wait_clock_event();
  sample_data();
endtask

这篇关于动态更改时钟块时钟极性的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

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