指令和微操作的区别 [英] Difference between an instruction and a micro-op

问题描述

机器指令和微操作有什么区别?我在此处找到了以下定义:

What is the difference between a machine instruction and a micro-op? I found a following definition here:

一个小的、基本的指令，串联使用组成一个高级别的指令机器指令

A small, basic instruction, used in series to make up a high-level machine instruction

这是我在维基百科

在计算机中央处理器中，微操作(也称为micro-ops 或 μops)是一些详细的低级指令设计来实现复杂的机器指令(有时称为此上下文中的宏指令)

In computer central processing units, micro-operations (also known as a micro-ops or μops) are detailed low-level instructions used in some designs to implement complex machine instructions (sometimes termed macro-instructions in this context)

我是否正确理解微操作是在给定周期内执行的处理器指令.说喜欢和 ADD、SUB、MUL、ST、LD.我错过了什么吗?

Am I correct in understanding that micro-op is a processor instruction that executes in a given cycle. Say like and ADD, SUB, MUL, ST, LD. Am I missing something?

感谢任何帮助.

推荐答案

几年前人们发现 RISC 比 CISC 更好.如果您想要一个非常高速的处理器，那么您希望所有指令都非常简单.这使它们能够在短时间内完成，从而获得更高的时钟速度.因此，Andrew Tanenbaum 预测从现在起 5 年内将不会有人运行 x86".那是在 90 年代.

Quite a few years ago it was discovered that RISC was better than CISC. If you wanted a very high speed processor then you wanted all your instructions to be very simple. This allows them to complete in a short period of time and thus a higher clock speed. So Andrew Tanenbaum predicted that "5 years from now no one will be running x86". That was in the 90s.

发生了什么?x86(因此 AMD64，也称为 x86_64)不是最著名的 CISC 指令集吗?好吧，不要低估英特尔(和 AMD)工程师的聪明才智.意识到如果他们想要一个更高速度的处理器(我们在 90 年代后期达到了超过 4GHz 的一个内核)，他们将无法在一个时钟周期内处理他们的复杂指令.解决方案是使用微操作".

So what happened? Isn't the x86 (and thus AMD64, also known as x86_64) the best known CISC instruction set? Well, don't underestimate the ingenuity of the Intel (and AMD) engineers. Realising that if they wanted a higher speed processor (back with one core we were hitting > 4GHz in the late 90s) that they couldn't process their complex instructions in one clock cycle. The solution was to use "micro-ops".

每个微操作将在单个时钟周期内执行，并且类似于 RISC 类型指令.当处理器遇到 CISC 指令时，它会将其解码为多个微操作，每个微操作持续一个周期.因此，他们可以保留旧的、粗糙的指令集架构(为了向后兼容)并具有非常高的时钟速度.

Each micro-op would execute in a single clock cycle and would resemble a RISC type instruction. When the processor encountered the CISC instruction it would decode it into several micro-ops, each of which would last one cycle. Thus they could keep their old cruddy instruction set architecture (for backwards compatibility) and have very high clock speeds.

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