Vulkan 顶部/管道底部和 ALL_COMMANDS [英] Vulkan TOP/ BOTTOM OF PIPE and ALL_COMMANDS

问题描述

作为很多初学者"，我认为使用 TOP_OF_PIPELINE 作为 dst 和 BOTTOM_OF_PIPELINE 作为 src 意味着两者都使用 ALL_COMMANDS.

As a lot of "beginner", I thought use TOP_OF_PIPELINE as a dst and BOTTOM_OF_PIPELINE as a src meant ALL_COMMANDS for both.

此处 Nicol Bolas 写道:由于顶部/管道底部对内存屏障没有意义，也许使用它们应该完全无效.因此仅对执行屏障有用."

Here Nicol Bolas wrote that "Since top/bottom of the pipe make no sense for memory barriers, maybe using them should just be flat-out invalid. And thus useful only for execution barriers."

据我了解，由于 TOP 和 BOTTOM 不会对内存进行任何访问，因此在顶部或底部设置屏障无法使内存可见^^.

From what I understand, since TOP and BOTTOM does not perform any access into memory, putting barrier on top or bottom can't make memory visible^^.

据我了解 Nicol Bolas 的意思以及我刚才所说的内存访问/可见性，当您使用底部或顶部时，您必须将 accessMask 设置为 0.

As I understand what Nicol Bolas means and what I just said about memory access / visibility, when you use bottom or top, you must set accessMask to 0.

如果我想展示图像，我可以这样做:

If I want to present the image, I can do something like that :

srcStage = COLOR_ATTACHMENT_OUTPUT_BIT
srcAccess = VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT
oldLayout = ATTACHMENT_OPTIMAL
dstStage = BOTTOM
dstAccess = 0; // Since memory read access will be "issued" by semaphore
newLayout = PRESENT_KHR;

我们在这里使用底部是因为我们不希望内存屏障使当前队列等待，因为它在规范中描述:

We use bottom here because we do not want the memory barrier make the current queue wait as it is described in the specs :

VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT 可用于在下一次访问将在不同队列中或由演示引擎完成时完成内存屏障和布局转换；在这些情况下，同一队列中的后续命令不需要等待，但屏障或转换必须在与批处理信号关联的信号量之前完成.

The VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT is useful for accomplishing memory barriers and layout transitions when the next accesses will be done in a different queue or by a presentation engine; in these cases subsequent commands in the same queue do not need to wait, but the barrier or transition must complete before semaphores associated with the batch signal.

所以现在，我可以说(我希望...)我知道何时使用每个阶段，但 TOP_OF_PIPE 不...

So now, I can say (I hope...) that I understand when to use every stages but TOP_OF_PIPE nop...

所以，有我的问题:究竟什么是执行屏障(因此没有内存屏障)?它们为什么有用?(因为说一个操作一个接一个发生是好的，但最好说我们可以在第二个操作中消费第一个操作中产生的数据).什么时候应该在管道底部或顶部放置障碍物?

So, there are my questions : What exactly is an execution barrier (thus without memory barrier)? Why are they useful? (because it is good to say that one operation happen after one other, but it is better to can say that we can consume the data produced in the first operation in the second operation). When should have I to put a barrier on Bottom or Top of pipeline?

谢谢！

推荐答案

究竟什么是执行屏障(因此没有内存屏障)?

What exactly is an execution barrier (thus without memory barrier)?

这正是规范所说的:它阻止操作的执行，直到先前发出的操作完成.

It is exactly what the specification says it is: it prevents the execution of an operation until a previously issued operation is finished.

它们为什么有用?(因为说一个操作一个接一个发生是好的，但最好说我们可以在第二个操作中消费第一个操作中产生的数据).

Why are they useful? (because it is good to say that one operation happen after one other, but it is better to can say that we can consume the data produced in the first operation in the second operation).

您假设消费数据是您唯一可能等待的事情.

You assume that consuming data is the only thing you might be waiting on.

例如，假设您正在传输一些纹理数据.好吧，在该纹理的所有使用完成之前，您无法开始执行复制到该纹理的内存中.但是您并没有消费这些过程产生的东西；你只需要等到这些过程完成.

For example, let's say you're streaming some texture data. Well, you can't start executing the copy into that texture's memory until all uses of that texture have finished. But you aren't consuming what those processes are generating; you just need to wait until those processes are done.

这就是纯执行屏障的用途.

That's what a pure execution barrier is for.

由于1.0.35明确了pipeline的含义，TOP和BOTTOM的含义更加明确.

Since 1.0.35 has clarified the meaning of pipelines, the meaning of TOP and BOTTOM are more clear.

具体说明是，您为源和目标指定的任何管道阶段都指定了该阶段及其之前/之后的所有阶段.因此，如果您将片段着色器指定为源，那么在它之前执行的所有阶段也是该屏障的一部分.如果您指定顶点着色器作为目标，那么它之后的所有阶段也将在同步后执行.

The specific clarification is that whatever pipeline stage you specify for source&destination specify that stage and all stages before/after it. So if you specify fragment shader as the source, then all stages that execute before it are also part of that barrier. If you specify vertex shader as the destination, then all stages after it will execute after that synchronization too.

所以 BOTTOM 作为源意味着在先前命令的所有阶段之后.TOP 作为目的地意味着在后续命令的所有阶段之前.BOTTOM 作为目的地没有任何实际意义，TOP 作为源也没有任何意义.

So BOTTOM as source means after all stages in prior commands. TOP as destination means before all stages in subsequent commands. BOTTOM as destination makes no real sense, nor does TOP as source.

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