为 32 位机器编译的所有代码都应该在 4 字节块中吗? [英] Should all code compiled for 32 bit machines be in 4 byte chunks?

问题描述

我编写了一个简单的 32 位汇编代码:

I have a simple 32-bit assembly code that I wrote:

movl  $0x542412e6, %eax
movl  %ebp , %edx
addl  $0x30, %edx
movl  %edx, %ebp
pushl 0x08048dd6
ret

当我运行这个命令时:

gcc -m32 -c e.s

我得到以下 18 个字节:

I get the following 18 bytes:

0:  b8 e6 12 24 54          mov    $0x542412e6,%eax
5:  89 ea                   mov    %ebp,%edx
7:  83 c2 30                add    $0x30,%edx
a:  89 d5                   mov    %edx,%ebp
c:  68 d6 8d 04 08          push   $0x8048dd6
11: c3                      ret 

为什么目标代码是 18 字节而不是 20 或 16 字节?对于 32 位机器，它不应该总是以 4 字节的字表示吗?

Why is the object code 18 bytes and not 20 or 16? Shouldn't it always be in 4-byte words for a 32-bit machine?

推荐答案

指令大小与数据或地址总线大小无关.一些 16 位 x86 CPU 有 3 种完全不同的大小，分别是 8 位数据总线、20 位地址总线和可变长度指令大小.为了向后兼容，现代 32 位或 64 位 x86 也有可变长度指令.

Instruction size does not related to data or address bus size. Some 16-bit x86 CPUs have 3 totally different sizes with 8-bit data bus, 20-bit address bus and variable length instruction size. Modern 32-bit or 64-bit x86 have variable length instruction too for backward compatibility.

只要查看 movl $0x542412e6, %eax 和 pushl 0x08048dd6 行，您就会发现不可能对 32 位立即数数据、操作码和寄存器进行编码32 位数据以内.如果架构使用 32 位固定长度指令，那么它必须使用多条指令或文字池来加载 32 位常量.

Just look at the movl $0x542412e6, %eax and pushl 0x08048dd6 line and you'll see that it's impossible to encode 32-bit immediate data, opcode and register within 32 bits of data. If an architecture uses 32-bit fixed-length instruction then it must use multiple instructions or a literal pool to load 32-bit constant.

RISC 架构通常具有固定宽度的指令，作为代码密度和解码器简单性之间的权衡.但是也存在指令大小与 32 位不同的 32 位 RISC 架构.例如 MIPS16e 和 ARM thumb v1 有 16 位指令，而 ARM thumb2 和 dalvikVM 有可变长度指令.现代 64 位 RISC 架构也不会有 64 位指令，而是经常坚持使用 32 位大小

RISC architectures often have fixed width instructions as a trade-off between code density and decoder simplicity. But 32-bit RISC architectures with instruction size different from 32-bit also exist. For example MIPS16e and ARM thumb v1 have 16-bit instructions whereas ARM thumb2 and dalvikVM have variable length instructions. Modern 64-bit RISC architectures also won't have 64-bit instructions but rather often stick with the 32-bit size

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