ARM Cortex-A7 中的系统控制寄存器 [英] System Control Registers in ARM Cortex-A7

查看:46
本文介绍了ARM Cortex-A7 中的系统控制寄存器的处理方法,对大家解决问题具有一定的参考价值,需要的朋友们下面随着小编来一起学习吧!

问题描述

MCRMRC指令以不同的cRmopt2执行时,cRn 注册?例如,如果运行:

When MCR or MRC instructions execute with different cRm or opt2, then what is the status of cRn register? For example if run:

asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r"(val))

asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r"(val))

那么,c9c13 将更改哪个寄存器的值?以及最后一个选项(0 或 2)的作用是什么?.这里

then, which register's value will be changed c9 or c13? and what is the role of last option(0 or 2)?.here

推荐答案

MCR 和 MRC 指令是通用协处理器指令.这些指令的作用取决于您使用的特定硬件、它具有的协处理器以及操作码和协处理器寄存器操作数的值(opcode1opcode2CRnCRm).协处理器寄存器操作数不一定指实际的协处理器寄存器,因此实际上是附加的操作码操作数.

The MCR and MRC instructions are generic coprocessor instructions. What these instructions do depends on the particular hardware you're using, what coprocessors it has, and the values of the opcode and coprocessor register operands (opcode1, opcode2, CRn and CRm). The coprocessor register operands don't necessarily refer to actual coprocessor registers, and so are effectively additional opcode operands.

要了解 MCR/MRC 指令的作用,您需要在特定于硬件的文档中查找此代码要在特定 CPU 下运行的文档.因此,对于您的示例,我们需要查看 Cortex-A7 的协处理器 15 的文档,它是系统控制协处理器".此页面列出了可以使用 CRnopcode1CRmopcode2 中的这些指令访问的系统控制寄存器命令.

To find out what an MCR/MRC nstructions does, you need to look up it up in the hardware specific documentation the particular CPU this code is meant to run under. So with your examples we need to look in the Cortex-A7's documentation for coprocessor 15, which is the System Control "coprocessor". This page lists the System Control registers that can be accessed using these instructions in CRn, opcode1, CRm, opcode2 order.

在您的两个示例中,CRn 都是 c9,在文档中查找它会导致我们主要描述性能监控相关寄存器的页面.在您的第一个示例中,opcode1 为 0,CRm 为 13,opcode2 为 0,该页面告诉我们指令写入 PMCR或性能监视器控制寄存器.在第二个示例中,opcode1 为 0,CRm 为 13,opcode2 为 2,这意味着它访问 PMNCNTENCLR 或计数启用清除寄存器.

In both your examples CRn is c9, and looking that up in the documentation leads to us to a page describing mostly performance monitoring related registers. In your first example opcode1 is 0, CRm is 13, and opcode2 is 0, which this page tells us that the instruction writes to the PMCR or Performance Monitor Control Register. With the second example opcode1 is 0, CRm is 13, and opcode2 is 2, meaning it accesses the PMNCNTENCLR or Count Enable Clear Register.

这篇关于ARM Cortex-A7 中的系统控制寄存器的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

查看全文
登录 关闭
扫码关注1秒登录
发送“验证码”获取 | 15天全站免登陆