UART控制器还是RS232控制器?UART是通用词吗? [英] UART controller or RS232 controller? Is UART a general word?

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问题描述

我有一个关于 UART 控制器的问题.

UART控制器是通用名称吗?

我的意思是,如果我们使用 RS-232 协议,我们应该将此 UART 控制器命名为 RS-232 控制器,如果我们使用 RS-485 作为协议,我们应该将此 UART 控制器称为 RS-485 控制器等等?

我注意到我们一般说网络控制器(协议:以太网,令牌环,ATM,..),如果实现的协议是以太网,例如,我们说以太网控制器.UART控制器和网络控制器之间的正确比较是否意味着它们都是通用名称?

非常感谢您的澄清

解决方案

参考书目:

串行是所有时分复用"的总称,使用一个昂贵的术语.这意味着数据会随着时间的推移而分散发送,通常是一位接一位.您命名的所有协议都是串行协议.

UART,即通用异步收发器,是最常用的串行协议之一.它几乎和我一样古老,而且非常简单.大多数控制器板载硬件 UART.它使用单根数据线发送数据,一根数据线接收数据.最常见的 8 位数据传输如下:1 个起始位,低电平,8 个数据位,1 个停止位,高电平.低电平起始位和高电平停止位意味着总是有一个从高到低的转换来启动通信.这就是UART的描述.没有电压电平,因此您可以将其设置为 3.3 V 或 5 V,无论您使用哪种微控制器.请注意,想要通过 UART 进行通信的微控制器必须就传输速度和比特率达成一致,因为它们只有起始位的下降沿才能同步.这就是所谓的异步通信.

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对于长距离通信(不一定是数百米),5 V UART 不是很可靠,这就是它被转换为更高电压的原因,通常为 +12 V 用于0"和 -12V 代表1".数据格式保持不变.然后你就有了 RS-232(你实际上应该称之为 EIA-232,但没有人这样做.)

重要提示:RS-232 与 TTL 串行通信 - SparkFun Electronics http://goo.gl/0IFYTl

时序依赖性是UART的一大缺点,解决方案是USART,用于通用同步/异步收发器.这个可以做UART,也可以做同步协议.在同步中,不仅有数据,还有时钟传输.每个位都有一个时钟脉冲告诉接收器它应该锁存那个位.同步协议要么需要更高的带宽,比如曼彻斯特编码,要么需要额外的时钟线,比如 SPI 和 I2C.

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串行编程/典型 RS232 硬件配置 - Wikibooks,开放世界的开放书籍 http://goo.gl/uTknU6

RS232 +------------+ +-----------+ +-----------+ +-----------+接口 |线 ||||接口 |||-----------+ 驱动程序/+---+ UART +---+ 逻辑 +---+ CPU ||接收器 |||||||+-----------+ +-----+-----+ +-----+-----+ +-----------+||||+-----+-----+ ||波特率 |||发电机+----------+||+-----------+

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UART(通用异步收发器)是串行硬件的核心.它是一个芯片或芯片的一部分,目的是在并行数据和串行数据之间进行转换.RS-232 UART 通常还在发送时添加必要的开始/停止和奇偶校验位,并在接收时解码此信息.

UART 通常完全依靠计算机逻辑电压运行. 它的串行数据输入/输出电压是计算机逻辑电压,而不是串行线路电压.它们将实际的线路接口留给特定的线路驱动器/接收器.此线路驱动器/接收器不一定需要是 RS-232 线路驱动器/接收器,但可以例如也可作为 RS-422 差分驱动器/接收器.这一点,以及波特率、奇偶校验、停止位数、数据位数是可编程的这一事实是 UART 被称为通用的原因.如果 UART 和线路驱动器/接收器都放置在同一个芯片中,它们之间的区别就会变得模糊.此类芯片通常也以UART"标签出售.

UART 被称为异步,因为它们不使用特殊的时钟信号与远程端同步.相反,它们使用开始/停止位来识别串行流中的数据位.

多亏了 UART,其余的硬件以及软件应用程序可以处理普通字节来保存通信数据.UART 的工作是在发送时将一个字节切割成一系列串行位,并在接收时将一系列位组装成一个字节.UART 通常包含 8 位宽的接收器和传输缓冲器.其中并非所有位都可以使用,例如使用 7 位传输.接收到的串行数据并行提供在接收缓冲区中,待发送数据并行写入发送缓冲区.根据 UART,缓冲区可能只有一个字节或几个字节的深度(在 15 或 16 字节的范围内).缓冲区越浅,与 CPU 的通信需要越精确.例如.如果接收缓冲区只有一个字节的深度,并且数据获取速度不够快,则下一个接收到的数据可以覆盖缓冲区中先前接收到的数据,并且先前接收到的数据丢失.

由于串行接口上​​的时序很重要,因此 UART 通常连接到波特率发生器,可以是 UART 芯片内部的,也可以是外部的.

SPI(串行外设接口)是另一种非常简单的串行协议.主机发送一个时钟信号,并且在每个时钟脉冲上,它向从机移出一位,从从机移出一位.因此,信号名称为 SCK 表示时钟,MOSI 表示 Master Out Slave In,MISO 表示 Master In Slave Out.通过使用 SS(从机选择)信号,主机可以控制总线上超过 1 个从机.将多个从设备连接到一个主设备有两种方法,一种是上面提到的即使用从设备选择,另一种是菊花链,它使用较少的硬件引脚(选择线),但软件变得复杂.

I2C(Inter-Integrated Circuit,发音为I squared C")也是一种同步协议,它是我们第一个看到其中包含一些智能"的协议;其他的笨拙地把位移进移出,就是这样.I2C 仅使用 2 根线,一根用于时钟 (SCL),一根用于数据 (SDA).这意味着主机和从机通过同一条线路发送数据,再次由创建时钟信号的主机控制.I2C 不使用单独的从机选择来选择特定设备,但具有寻址功能.主机发送的第一个字节包含一个 7 位地址(以便您可以使用总线上的 127 个设备)和一个读/写位,指示下一个字节是否也将来自主机,应该来自奴隶.在每个字节接收器必须发送一个0"以确认接收到字节后,主机用第 9 个时钟脉冲锁存该字节.如果主机想要写入一个字节,则重复相同的过程:主机将一位接一位地放在总线上,并且每次都给出一个时钟脉冲来表示数据已准备好读取.如果主机想要接收数据,它只生成时钟脉冲.当给定时钟脉冲时,从机必须注意下一位已准备好.该协议是NXP(原飞利浦)的专利,为了节省许可成本,Atmel 使用了与I2C 完全相同的TWI(2-wire interface)一词,因此任何AVR 设备都不会有I2C,但会有TWI.

同一线上的两个或多个信号可能会导致冲突,如果一个设备发送1"而另一个设备发送0",您就会遇到问题.因此总线是线或的:两个电阻将总线拉到高电平,设备只发送低电平.如果他们想发送一个高电平,他们只需释放总线.

TTL(晶体管晶体管逻辑)不是协议.它是一种较旧的数字逻辑技术,但该名称通常用于指代 5 V 电源电压,通常不正确地指代应称为 UART 的东西.


关于这些,你可以写一本书,看起来我已经在路上了.这只是一个非常简短的概述,如果有些事情需要澄清,请告诉我们.

I have a question regarding UART controller.

Is UART controller a general name?

i mean that if we use RS-232 protocol, we should name this UART controller, RS-232 controller and if we use RS-485 as protocol, we should call this UART controller, a RS-485 controller and so on?

I've noticed that we generally say network controller (protocols:Ethernet, token ring,ATM,..) and if the protocol implemented is Ethernet for example, we say Ethernet controller. Is it a correct comparison between UART controller and Network controller meaing that they both are general names?

Thanks a lot for your clarifications

解决方案

Bibliography:

Serial is an umbrella word for all that is "Time Division Multiplexed", to use an expensive term. It means that the data is sent spread over time, most often one single bit after another. All the protocols you're naming are serial protocols.

UART, for Universal Asynchronous Receiver Transmitter, is one of the most used serial protocols. It's almost as old as I am, and very simple. Most controllers have a hardware UART on board. It uses a single data line for transmitting and one for receiving data. Most often 8-bit data is transferred, as follows: 1 start bit, low level, 8 data bits, 1 stop bit, high level. The low level start bit and high level stop bit mean that there's always a high to low transition to start the communication. That's what describes UART. No voltage level, so you can have it at 3.3 V or 5 V, whichever your microcontroller uses. Note that the microcontrollers which want to communicate via UART have to agree on the transmission speed, the bit-rate, as they only have the start bit's falling edge to synchronize. That's called asynchronous communication.

For long distance communication (a that doesn't have to be hundreds of meters) the 5 V UART is not very reliable, that's why it's converted to a higher voltage, typically +12 V for a "0" and -12 V for a "1". The data format remains the same. Then you have RS-232 (which you actually should call EIA-232, but nobody does.)

Important: RS-232 vs. TTL Serial Communication - SparkFun Electronics http://goo.gl/0IFYTl

The timing dependency is one of the big drawbacks of UART, and the solution is USART, for Universal Synchronous/Asynchronous Receiver Transmitter. This can do UART, but also a synchronous protocol. In synchronous there's not only data, but also a clock transmitted. With each bit a clock pulse tells the receiver it should latch that bit. Synchronous protocols either need a higher bandwidth, like in the case of Manchester encoding, or an extra wire for the clock, like SPI and I2C.

Serial Programming/Typical RS232 Hardware Configuration - Wikibooks, open books for an open world http://goo.gl/uTknU6

RS232      +-----------+   +-----------+   +-----------+   +-----------+
Interface  | Line      |   |           |   | Interface |   |           |
-----------+ Driver /  +---+   UART    +---+ Logic     +---+    CPU    |
           | Receiver  |   |           |   |           |   |           |
           +-----------+   +-----+-----+   +-----+-----+   +-----------+
                                 |               |
                                 |               |
                           +-----+-----+         |
                           | Baud Rate |         |
                           | Generator +---------+
                           |           |
                           +-----------+

The UART (universal asynchronous receiver transmitter) is the heart of the serial hardware. It is a chip or part of a chip with the purpose to convert between parallel data and serial data. RS-232 UARTs also typically add the necessary start/stop and parity bits when transmitting, and decode this information when receiving.

A UART typically operates entirely on computer logic voltage. Its serial data input/output voltage is the computer logic voltage, not the serial line voltage. They leave the actual line interface to a particular line driver / receiver. This line driver / receiver does not necessarily need to be an RS-232 line driver / receiver, but could e.g. also be an RS-422 differential driver / receiver. This, and the fact that baud rate, parity, number of stop bits, number of data bits are programmable is the reason why UARTs are called universal. The distinction between UART and line driver / receiver blurs if they are both placed in the same chip. Such chips are typically also sold under the label 'UART'.

UARTs are called asynchronous, because they don't use a special clock signal to synchronize with the the remote side. Instead, they use the start/stop bits to identify the data bits in the serial stream.

Thanks to the UART the rest of the hardware, as well as the software application can deal with normal bytes to hold the communication data. It is the job of the UART to chop a byte into a series of serial bits when sending, and to assemble series of bits into a byte when receiving. UARTs typically contain eight bit wide receiver and transmission buffers. Of which not all bits might be used if e.g. a 7 bit transmission is used. Received serial data is provided in parallel in the receiver buffer, to-be-send data is written in parallel to the transmission buffer. Depending on the UART the buffers might just have a depth of one byte, or a few bytes (in the range of 15 or 16 bytes). The less deep the buffers are, the more precise the communication with the CPU needs to be. E.g. if the receiver buffer just has a depth of one byte, and the data is not fetched fast enough, the next received data can overwrite the previously received data in the buffer, and the previously received data is lost.

Because of the fact that the timing on the serial interface is important, UARTs are typically connected to a baud rate generator, either an internal one in the UART chip, or an external one.

SPI (Serial Peripheral Interface) is another very simple serial protocol. A master sends a clock signal, and upon each clock pulse it shifts one bit out to the slave, and one bit in, coming from the slave. Signal names are therefore SCK for clock, MOSI for Master Out Slave In, and MISO for Master In Slave Out. By using SS (Slave Select) signals the master can control more than 1 slave on the bus. There are two ways to connect multiple slave devices to one master, one is mentioned above i.e. using slave select, and other is daisy chaining, it uses less hardware pins(select lines), but software gets complicated.

I2C (Inter-Integrated Circuit, pronounced "I squared C") is also a synchronous protocol, and it's the first we see which has some "intelligence" in it; the other ones dumbly shifted bits in and out, and that was that. I2C uses only 2 wires, one for the clock (SCL) and one for the data (SDA). That means that master and slave send data over the same wire, again controlled by the master who creates the clock signal. I2C doesn't use separate Slave Selects to select a particular device, but has addressing. The first byte sent by the master holds a 7 bit address (so that you can use 127 devices on the bus) and a read/write bit, indicating whether the next byte(s) will also come from the master of should come from the slave. After each byte receiver must send a "0" to acknowledge the reception of the byte, which the master latches with a 9th clock pulse. If the master wants to write a byte the same process repeats: the master puts bit after bit on the bus and each time gives a clock pulse to signal that the data is ready to be read. If the master wants to receive data it only generates the clock pulses. The slave has to take care that the next bit is ready when the clock pulse is given. This protocol is patented by NXP(formerly Phillips), to save licensing cost, Atmel using the word TWI(2-wire interface) which exactly same as I2C, so any AVR device will not have I2C but it will have TWI.

Two or more signals on the same wire may cause conflicts, and you would have a problem if one device sends a "1" while the other sends a "0". Therefore the bus is wired-OR'd: two resistors pull the bus to a high level, and the devices only send low levels. If they want to send a high level they simply release the bus.

TTL (Transistor Transistor Logic) is not a protocol. It's an older technology for digital logic, but the name is often used to refer to the 5 V supply voltage, often incorrectly referring to what should be called UART.


About each of these you can write a book, and it looks I'm well on my way. This is just a very brief overview, let us know if some things need clarification.

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