makefile自动src文件检测和依赖生成 [英] makefile automatic src file detection and dependency generation

问题描述

我的c ++项目有以下设置：

在src文件夹中，有* .cpp和对应的* .h文件和
在obj文件夹中我想有我的.o文件。

到目前为止，编译和链接不是问题。但现在我有太多的.cpp和.h文件，以手动将它们放入Makefile。所以我决定在makefile中写这个小指令：

  collect_sources：
 @echo收集源文件 
 @echoSRCS = \\>来源; 
 @for文件在./src/*.cpp中; \ 
 do \ 
 echo$$ file \\>>来源; \ 
 done 
  

我也做了

  -include来源
  

makefile

生成的文件 sources 看起来不错，虽然在最后一行中有一个反斜杠，喜欢。但是afaik它也应该是有害的。

我现在也需要自动构建依赖项。在我的最后一个版本中，我在Makefile中直接定义了* .cpp文件作为 SRCS ，以下代码是好的：

  $（SRCDIR）/％。cpp：
 @ $（CXX）$（DEPFLAGS）-MT \ 
$ SRCDIR），$（OBJDIR），$（subst $（EXT_SRC），$（EXT_OBJ），$$ file））\ 
 $（addprefix，$$ file）> $（DEP）; 
 clear_dependencies：
 echo> $（DEP）; 
 
 depend：clear_dependencies $（SRCS）
  

这里是在Makefile顶部定义的常量：

  CXX = g ++ 
 CXXFLAGS = -Wall \ 
 -Wextra \ 
  - Wuninitialized \ 
 -Wmissing-declarations \ 
 -pedantic \ 
 -O3 \ 
 -p -g -pg 
 LDFLAGS = -p -g  - pg 
 DEPFLAGS = -MM 
 
 SRCDIR = ./src 
 OBJDIR =。/ obj 
 
 TARGET = ./bin/my_funky_function_which_is_not_the_real_name 
 
 -include sources 
 
 OBJSTMP = $（SRCS：.cpp = .o）
 OBJS = $（OBJSTMP：$（SRCDIR）= $（OBJDIR））
 DEP = depends.main 
 EXT_SRC = .cpp 
 EXT_OBJ = .o 
  

我缺少什么？我的方法是否有效/可行？

解决方案

好了，你问了。

1：您的 collect_sources：...包括来源是荣誉的Rube Goldberg hackery。只要这样做：

  SRCS = $（通配符./src/*.cpp）
  

如果您想通过眼睛确认，可以这样做：

  $（info $（SRCS））
  

2 ：

  clear_dependencies：
 echo> $（DEP）; 
  

只是为了美观，让我们解决这个问题。

  clear_dependencies：
 $（RM）$（DEP）; 
  

3：

  $（SRCDIR）/％。cpp：
 @ $（CXX）$（DEPFLAGS）-MT \ 
$（subst $（SRCDIR） ，$（OBJDIR），$（subst $（EXT_SRC），$（EXT_OBJ），$$ file））\ 
 $（addprefix，$$ file）> $（DEP）; 
  

这需要一些工作。首先是立即问题：目标是一个真实文件存在，而规则没有先决条件。因此，规则不会运行（我不知道为什么它在以前的版本中为您工作，也许别的不同）。作为临时修复，我建议我们切换到静态模式规则和PHONY目标：

  .PHONY：$（SRCS）
 $（SRCS）：$（SRCDIR）/％。cpp：
 @ $（CXX）$（DEPFLAGS）-MT \ 
 ... 
  
 
 
 
看看是否一切正常，然后我们可以解决大问题。
 
I have the following setup for my c++ project:

in the src-folder, there are *.cpp and corresponding *.h files and
in the obj-folders I want to have my .o-files.

so far, compiling and linking is not the problem. But now I have too many .cpp and .h files to put them into the Makefile manually. So I decided to write this little instruction in the makefile:
collect_sources:
@echo "collecting source files";
@echo "SRCS = \\" > sources;
@for file in ./src/*.cpp; \
do \
    echo "$$file \\" >> sources; \
done
I also do
-include sources
at the beginning of the makefile

The resulting file sources looks fine, although there is a backslash in the last line which I don't like. But afaik it should be harmful either.

I now also need to automatically build up dependencies. In my last version in which I defined the *.cpp-files as SRCS directly in the Makefile, the following code was good:
$(SRCDIR)/%.cpp:
  @$(CXX) $(DEPFLAGS) -MT \
  "$(subst $(SRCDIR),$(OBJDIR),$(subst $(EXT_SRC),$(EXT_OBJ),$$file))" \
  $(addprefix ,$$file) >> $(DEP);
clear_dependencies:
    echo "" > $(DEP);

depend: clear_dependencies $(SRCS)
But with including the sources-file, it never reaches the upper code block.

Here are the constants defined at the top of the Makefile:
CXX = g++
CXXFLAGS = -Wall \
       -Wextra \
       -Wuninitialized \
       -Wmissing-declarations \
       -pedantic \
       -O3 \
       -p -g -pg
LDFLAGS =  -p -g -pg
DEPFLAGS = -MM

SRCDIR  = ./src
OBJDIR  = ./obj

TARGET = ./bin/my_funky_function_which_is_not_the_real_name

-include sources

OBJSTMP =   $(SRCS:.cpp=.o)
OBJS        =   $(OBJSTMP:$(SRCDIR)=$(OBJDIR))
DEP = depend.main
EXT_SRC =   .cpp
EXT_OBJ =   .o
What am I missing? Is my approach valid/feasible?
解决方案
All right, you asked for it.

1: Your collect_sources:... include sources is glorious Rube Goldberg hackery. Just do this:
SRCS = $(wildcard ./src/*.cpp)
And if you want to confirm it by eye, you can do this:
$(info $(SRCS))
2:
clear_dependencies:
    echo "" > $(DEP);
Just for the sake of aesthetics, let's fix this.
clear_dependencies:
    $(RM) $(DEP);
3:
$(SRCDIR)/%.cpp:
    @$(CXX) $(DEPFLAGS) -MT \
  "$(subst $(SRCDIR),$(OBJDIR),$(subst $(EXT_SRC),$(EXT_OBJ),$$file))" \
  $(addprefix ,$$file) >> $(DEP);
This will take some work. First the immediate problem: the target is a real file which exists, and the rule has no prerequisites. Therefore the rule will not be run (I have no idea why it worked for you in a previous version, maybe something else was different). As a temporary fix I suggest we switch to a static pattern rule and PHONY targets:
.PHONY:$(SRCS)
$(SRCS) : $(SRCDIR)/%.cpp:
    @$(CXX) $(DEPFLAGS) -MT \
   ...
See if all that works, then we can tackle the big stuff.

                        
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