浮点数运算中的齐平零行为 [英] flush-to-zero behavior in floating-point arithmetic

问题描述

尽管如此，据我所知，IEEE 754并没有提到一个冲洗到零模式来处理非规范化数字更快，一些架构提供此模式（例如 http：// docs.sun.com/source/806-3568/ncg_lib.html ）。

在本技术文档的特定情况下，对非规范化数字进行标准处理是默认值，必须明确激活flush-to-zero。在默认模式下，非规范化的数字也可以在软件中处理，这是较慢的。

我在嵌入式C的静态分析器上工作，试图预测是否正确（如果有时不精确）范围适用于运行时可能发生的值。它旨在是正确的，因为它旨在可用于排除运行时出现问题的可能性（例如关键的嵌入式代码）。这需要在分析期间捕获所有可能的行为，因此在浮点计算期间产生所有可能的值。

在这种情况下，我的问题有两个方面：

1. 有没有仅提供flush-to-zero 的架构？他们可能不一定要自己宣传为IEEE 754，但可以提供足够接近的IEEE 754风格的浮点运算。




2. 在嵌入式环境中提供的架构不会被系统激活的冲洗到零，以便使反应时间更可预测（这些嵌入式的常见约束系统）？

在我用于浮点值的间隔算术中处理flush-to-zero是简单的足够的，如果我知道我必须这样做，我的问题就是我是否需要这样做。

解决方案

。有一些平台只支持flush-to-zero，而且有许多平台是flush-to-zero是默认的。

你还应该意识到许多嵌入式并且dsp平台使用Denormals Are Zero模式，这是浮点式语义中的另一个皱纹。

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<强制>编辑对FTZ与DAZ的进一步解释：

在FTZ中，当一个操作会在通常的算术下产生异常结果时，返回零代替。请注意，一些实现总是刷新到正零，而其他实现可能会刷新到正零或负零。最好不要依赖于任何行为。

在DAZ中，当一个操作的输入是一个非正常的时候，一个零代替它的位置。再次，没有一个通用的保证可以替换零。

支持这些模式的一些实现允许它们独立设置（有些只支持两者之一） ，所以可能需要您独立模拟任何一种模式以及在一起。

还要注意，一些实现将这两种模式组合成冲洗到零 。例如，ARM VFPflush to zero模式是FTZ和DAZ。

While, as far as I remember, IEEE 754 says nothing about a flush-to-zero mode to handle denormalized numbers faster, some architectures offer this mode (e.g. http://docs.sun.com/source/806-3568/ncg_lib.html ).

In the particular case of this technical documentation, standard handling of denormalized numbers is the default, and flush-to-zero has to be activated explicitly. In the default mode, denormalized numbers are also handled in software, which is slower.

I work on a static analyzer for embedded C which tries to predict correct (if sometimes imprecise) ranges for the values that can happen at run-time. It aims at being correct because it is intended to be usable to exclude the possibility of something going wrong at run-time (for instance for critical embedded code). This requires having captured all possible behaviors during the analysis, and therefore all possible values produced during floating-point computations.

In this context, my question is twofold:

1. among the embedded architectures, are there architectures that offer only flush-to-zero? They would perhaps not have to right to advertise themselves as "IEEE 754", but could offer close-enough IEEE 754-style floating-point operations.

2. For the architectures that offer both, in an embedded context, isn't flush-to-zero likely to be activated by the system, in order to make the reaction time more predictable (a common constraint for these embedded systems)?

Handling flush-to-zero in the interval arithmetic that I use for floating-point values is simple enough if I know I have to do it, my question is more whether I have to do it.

解决方案

Yes to both questions. There are platforms that support flush-to-zero only, and there are many platforms where flush-to-zero is the default.

You should also be aware that many embedded and dsp platforms use a "Denormals Are Zero" mode, which is another wrinkle in the floating-point semantics.

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Edit further explanation of FTZ vs. DAZ:

In FTZ, when an operation would produce a denormal result under the usual arithmetic, a zero is returned instead. Note that some implementations always flush to positive zero, whereas others may flush to either positive or negative zero. It's probably best not to depend on either behavior.

In DAZ, when an input to an operation is a denormal, a zero is substituted in its place. Again, there's no general guarantee about which zero will be substituted.

Some implementations that support these modes allow them to be set independently (and some support only one of the two), so it may be necessary for you to be able model either mode independently as well as together.

Note also that some implementations combine these two modes into "Flush to Zero". The ARM VFP "flush to zero" mode is both FTZ and DAZ, for example.

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