为什么“DIV EDX”在MASM中总是会产生处理器异常？ [英] Why "DIV EDX" in MASM always generates processor exception?

问题描述

我在上个学期我的计算机体系结构考试信息学有这个问题：
为什么MASM中的DIV EDX总是会产生处理器异常？

什么是产生异常的机制？

解决方案

当您在x86 CPU上执行1操作数除法时，EDX：EAX（64位）由第一个操作数（32位）除。结果存储在EAX（32位）中。

所以当EDX划分为EAX时，你本质上得到的是（EDX * 0x100000000 + EAX）/ EDX，其结果始终高于0x100000000，不适用于目标寄存器或除数为零。在这两种情况下都会发生除异例。

另请参见此页面（来自英特尔开发者手册）。

请注意这不是特定于汇编程序（MASM），而是在这种情况下的平台。

I've got that question on my Computer Architecture Exam on Informatics last semester : "Why 'DIV EDX' in MASM always generates processor exception?"
What is the mechanism which generates exception?

解决方案

When you do 1-operand division on x86 CPUs, EDX:EAX (64 bit) is divided by the 1st operand (32 bit). The result is stored in EAX (32 bit).

So when you divide by EDX:EAX by EDX, what you essentially get is (EDX * 0x100000000 + EAX) / EDX, which result is always above 0x100000000 and does not fit into the target register or the divisor is zero. In both cases a divide exception occurs.

See also this page (from the Intel developer manuals).

Note that this is not specific to the assembler (MASM), but to the platform in this case.

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