c文件中的#ifndef? [英] #ifndef in c file?
问题描述
是否可以将 #ifndef
放在c文件的顶部?基本上我需要检查某个预处理器常量是否在运行程序时声明,并且我的程序会相应地改变。
我需要检查 - D DESCENDING_ORDER = 1
被添加为参数(无关紧要)。
我的代码位于我的顶部主要的c文件:
#ifndef DESCENDING_ORDER
int ascending = 1;
#else
int ascending = 0;
#endif
编译时自动运行,但在尝试编译时遇到错误一个Makefile,一些符合预期标识符之前的'int'for int ascending = 1
。
谢谢
$ b 编辑 - 添加了Makefile代码
CC = gcc
CFLAGS = -g -Wall
INC = -include
RES_OBS = res.o
LIBS =
all:res
res:$( RES_OBS)
$(CC)$(CFLAGS)-o res $(RES_OBS)$(LIBS)$(INC)res.h -D DESCENDING_ORDER = 1
clean :
rm -f * .o
clobber:
make clean
rm -f res
在命令结尾处猜测并添加 $(INC).... DESCENDING_ORDER = 1
所以这可能是为什么它不起作用。
命令我没有使用makefile:
gcc res -include res。 h -D DESCENDING_ORDER = 1
编辑2 - 有一点玩不同的参数,发现如果我在命令中删除 -include res.h
,我会得到同样的错误。仍然不确定如何正确引用makefile中的头文件?我在我的res.c文件中添加了 #includeres.h
,但仍然出现错误。
Makefile
中有一个错字。应该是 $(CFLAGS)
。 通过运行
make -p
,了解更多关于 make
的知识,在 make
中使用它们(例如考虑使用 $(COMPILE.c)
和 $($ LINK.c)
etc。) 不要忘记添加 -Wall
添加到您的 CFLAGS
中,因为您需要编译器的所有警告。您可能也需要调试信息,所以也要添加 g
。
在Linux上,我建议使用重拍用于调试 Makefile
-s通过运行<$ c $标准做法是:
- >
-
避免将
-include
传递给gcc
,而是添加一个<$在相关的*。c
源文件 的开始处附近的c#c> #includeres.h -
将
-D
粘贴到已定义的符号上,例如-DDESCENDING_ORDER = 1
-
添加到
Makefile
将相关目标文件依赖于新的#include
-d文件res.h
;注意这些依赖可以自动生成(通过将-MD
传递给gcc
等等) / p> -
传递
-DDESCENDING_ORDER = 1
通过CFLAGS
或更好CPPFLAGS
不要忘记 $ h $>
$ b
您可能需要使用
code> gcc -C -E
,你可以有一个像
res的规则。 i:res.c res.h
$ p $然后执行
$(CC)-C -E $(CFLAGS)$(CPPFLAGS)$ ^ -o $ @
make res.i
并用某个编辑器或寻呼机(可能> less code>)预处理器输出
res.i
;或者,在命令行上执行此操作gcc -C -E -I。 -DDESCENDING_ORDER = 1 res.c |减去
您可以移除生成的行信息并执行操作
gcc -C -E -I。 -DDESCENDING_ORDER = 1 res.c | grep -v'^#'> res_.i
gcc -Wall -c res_.i
关键是预处理在 C 中是一个文本操作,并且您的预处理过的表单是错误的。
最近的Clang / LLVM(版本3.2)或GCC发布版本4.8)编译器为您提供更好的预处理消息。
Is it possible to put
#ifndef
at the top of a c file? Basically I need to check whether a certain preprocessor constant was declared when running the program and my program will change accordingly.I need to check if
-D DESCENDING_ORDER=1
is added as an argument (doesn't matter what value given).I have this code at the top of my main c file:
#ifndef DESCENDING_ORDER int ascending = 1; #else int ascending = 0; #endif
Works when compiling by itself, but I get errors when I try compiling with a Makefile, something along the lines of "expected identifier before 'int' for
int ascending = 1
.Thanks.
EDIT - Added Makefile code
CC=gcc CFLAGS=-g -Wall INC=-include RES_OBS=res.o LIBS= all: res res: $(RES_OBS) $(CC) $(CFLAGS) -o res $(RES_OBS) $(LIBS) $(INC) res.h -D DESCENDING_ORDER=1 clean: rm -f *.o clobber: make clean rm -f res
Kind of guessed and added
$(INC)....DESCENDING_ORDER=1
to the end of the command, so that's probably why it's not working. Command I'm using without makefile:gcc res -include res.h -D DESCENDING_ORDER=1
EDIT 2 - Had a little play with different arguments and found that I get the same error if I remove
-include res.h
in the command. Still not sure how to correctly reference the header file in the makefile? I've added the#include "res.h"
in my res.c file but still get the error.解决方案There is a typo in your
Makefile
since$(CLAGS)
should be$(CFLAGS)
. Learn a lot more aboutmake
, notably by runningmake -p
which shows you the many built-in rules tomake
and use them (e.g. consider using$(COMPILE.c)
and$(LINK.c)
etc..)Don't forget to add
-Wall
to yourCFLAGS
, because you want all the warnings from the compiler. You probably want debugging information too, so addg
also.On Linux, I do recommend using remake for debugging
Makefile
-s by runningremake -x
which helps a lot.Standard practices are:
avoid passing
-include
togcc
, instead, add a#include "res.h"
near the beginning of relevant*.c
source filesglue the
-D
to the defined symbol, e.g.-DDESCENDING_ORDER=1
add in your
Makefile
the dependencies on relevant object files to the newly#include
-d fileres.h
; notice that these dependencies could be automatically generated (by passing e.g.-MD
togcc
, etc etc...)pass the
-DDESCENDING_ORDER=1
thruCFLAGS
or betterCPPFLAGS
Don't forget that the order of program arguments to
gcc
matters a lot.addenda
You may want to generate the preprocessed form
res.i
of your source coderes.c
usinggcc -C -E
and you could have a rule likeres.i: res.c res.h $(CC) -C -E $(CFLAGS) $(CPPFLAGS) $^ -o $@
then do
make res.i
and examine with some editor or pager (perhapsless
) the preprocessor outputres.i
; alternatively, do that on the command linegcc -C -E -I. -DDESCENDING_ORDER=1 res.c | less
you could remove the generated line information and do
gcc -C -E -I. -DDESCENDING_ORDER=1 res.c | grep -v '^#' > res_.i gcc -Wall -c res_.i
The point is that the preprocessing in C is a textual operation, and your preprocessed form is wrong.
BTW very recent Clang/LLVM (version 3.2) or GCC (just released version 4.8) compilers give you much better messages regarding preprocessing.
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