编写VHDL优先级编码器的简短方法 [英] short way to write VHDL priority encoder
问题描述
你能告诉我是否有更好的方法在VHDL中编写优先级编码器而不仅仅是使用if-else语句?我的意思是,我有这个代码,它的工作原理,但它可以写得更短吗? Switch是一个std_logic_vector。
Could you tell me if there is a better way to write a priority encoder in VHDL than just using if-else statements? I mean, I have got this code and it works, but could it be written shorter? Switch is an std_logic_vector.
感谢您的帮助!
shifting : PROCESS(CLK_IN, new_length_ready, switch)
VARIABLE highest_switch : INTEGER RANGE 0 TO 15 := 15;
BEGIN
-- priority encoder, changes the length of the snake track
-- ( i.e., number of leds for the snake to move )
IF switch(15) = '1' THEN
highest_switch := 15;
ELSIF switch(14) = '1' THEN
highest_switch := 14;
ELSIF switch(13) = '1' THEN
highest_switch := 13;
ELSIF switch(12) = '1' THEN
highest_switch := 12;
ELSIF switch(11) = '1' THEN
highest_switch := 11;
ELSIF switch(10) = '1' THEN
highest_switch := 10;
ELSIF switch(9) = '1' THEN
highest_switch := 9;
ELSIF switch(8) = '1' THEN
highest_switch := 8;
ELSIF switch(7) = '1' THEN
highest_switch := 7;
ELSIF switch(6) = '1' THEN
highest_switch := 6;
ELSIF switch(5) = '1' THEN
highest_switch := 5;
ELSIF switch(4) = '1' THEN
highest_switch := 4;
ELSIF switch(3) = '1' THEN
highest_switch := 3;
ELSIF switch(2) = '1' THEN
highest_switch := 2;
ELSIF switch(1) = '1' THEN
highest_switch := 1;
ELSIF switch(0) = '1' THEN
highest_switch := 0;
ELSE
highest_switch := 15;
END IF
推荐答案
在一个过程中,你可以使用循环。
Within a process, you can use a loop.
type Switches is range 0 to 15;
shifting : PROCESS(switch)
VARIABLE highest_switch : Switches := 15;
begin
for i in Switches loop
if switch(i) = '1' then
highest_switch := i;
end if;
end loop
...
end process;
请注意,如果设置了多个开关,则会多次分配变量。然而,当循环按递增顺序执行时,最后一个(最高)分配获胜。
Notice that if several switches are set, the variable is assigned multiple times. However as the loop is executed in increasing order, the last (highest) assignment wins.
顺便说一句,这个过程和你的一样是组合的,但我从灵敏度中删除了不必要的信号名单。让它同步会更好;
Incidentally this process, like yours is combinational, but I removed unnecessary signals from the sensitivity list. It would be better to make it synchronous;
shifting : PROCESS(clk)
begin
if rising_edge(clk) then
for i in ...
end if;
end process;
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