使通配符子目录成为目标 [英] make wildcard subdirectory targets
问题描述
我的应用程序主目录中有一个"lib"目录,其中包含任意数量的子目录,每个子目录都有自己的Makefile.
I have a "lib" directory in my applications main directory, which contains an arbitrary number of subdirectories, each having its own Makefile.
我想在主目录中有一个Makefile,它调用每个子目录的Makefile.我知道如果手动列出子目录是可能的,但是我想自动完成.
I would like to have a single Makefile in the main directory, that calls each subdirectory's Makefile. I know this is possible if I manually list the subdirs, but I would like to have it done automatically.
我在想类似以下内容的方法,但显然不起作用.请注意,我也有清除,测试等目标,因此%可能根本不是一个好主意.
I was thinking of something like the following, but it obviously does not work. Note that I also have clean, test, etc. targets, so % is probably not a good idea at all.
LIBS=lib/*
all: $(LIBS)
%:
(cd $@; $(MAKE))
感谢您的帮助!
推荐答案
以下内容适用于GNU make
:
The following will work with GNU make
:
LIBS=$(wildcard lib/*)
all: $(LIBS)
.PHONY: force
$(LIBS): force
cd $@ && pwd
如果lib
中可能存在目录以外的其他内容,则可以选择使用:
If there might be something other than directories in lib
, you could alternatively use:
LIBS=$(shell find lib -type d)
要解决多个目标的问题,您可以为每个目录构建特殊的目标,然后去除子构建的前缀:
To address the multiple targets issue, you can build special targets for each directory, then strip off the prefix for the sub-build:
LIBS=$(wildcard lib/*)
clean_LIBS=$(addprefix clean_,$(LIBS))
all: $(LIBS)
clean: $(clean_LIBS)
.PHONY: force
$(LIBS): force
echo make -C $@
$(clean_LIBS): force
echo make -C $(patsubst clean_%,%,$@) clean
这篇关于使通配符子目录成为目标的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!