Makefile目标依赖项中的变量替换 [英] Variable substitution in Makefile target dependency

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本文介绍了Makefile目标依赖项中的变量替换的处理方法,对大家解决问题具有一定的参考价值,需要的朋友们下面随着小编来一起学习吧!

问题描述

我有一个Makefile,其目标具有关联的依赖关系.所以我使用查找表,如:

I have a Makefile with targets that have associated dependencies. So I use lookup table like:

APPS = a b c

dependency.lookup.a := x
dependency.lookup.b := y
dependency.lookup.c := z

$(APPS): %: path/$(dependency.lookup.%).datafile
    do something with $(dependency.lookup.$@)

此生成文件给我错误. ***没有规则可以使目标'path/.datafile'

This makefile gives me error. *** No rule to make target 'path/.datafile'

约束:仅MinGW.不能使用shell/MSYS.还支持FreeBSD.

Constraints: Only MinGW. can't use shell/MSYS. Also support FreeBSD.

推荐答案

这需要使用二次扩展功能:

.SECONDEXPANSION:
$(APPS): %: path/$$(dependency.loopup.$$*).datafile
    @echo "$@ depends on $^"

%.datafile : # Create one on demand for testing.
    mkdir -p ${@D}
    touch $@

输出:

mkdir -p path/
touch path/x.datafile
a depends on path/x.datafile


或者,使用常规依赖项:


Alternatively, use regular dependencies:

a : path/x.datafile
b : path/y.datafile
c : path/z.datafile

$(APPS): % :
    @echo "$@ depends on $^"

前3行仅添加依赖项,该规则是单独指定的.输出是相同的.

The top 3 lines only add dependencies, the rule is specified separately. The output is the same.

这篇关于Makefile目标依赖项中的变量替换的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

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