ARM 引导加载程序:中断向量表理解 [英] ARM bootloader: Interrupt Vector Table Understanding
问题描述
下面的代码是u-boot定义中断向量表的第一部分，我的问题是每一行将如何使用.我理解前两行是起点和要实现的第一条指令:reset，我们在下面定义了reset.但是我们什么时候会使用下面的这些说明呢?根据System.map，每条指令都有一个固定地址，所以_fiq在0x0000001C，当我们要执行fiq时，我们将这个地址复制到pc然后执行，对吗?但是我们可以通过哪种方式跳转到这条指令:ldr pc, _fiq?是通过硬件还是软件实现的?希望我让自己正确理解.
The code following is the first part of u-boot to define interrupt vector table, and my question is how every line will be used. I understand the first 2 lines which is the starting point and the first instruction to implement: reset, and we define reset below. But when will we use these instructions below? According to System.map, every instruction has a fixed address, so _fiq is at 0x0000001C, when we want to execute fiq, we will copy this address into pc and then execute,right? But in which way can we jump to this instruction: ldr pc, _fiq? It's realised by hardware or software? Hope I make myself understood correctly.
>.globl _start
>_start:b reset
> ldr pc, _undefined_instruction
> ldr pc, _software_interrupt
> ldr pc, _prefetch_abort
> ldr pc, _data_abort
> ldr pc, _not_used
> ldr pc, _irq
> ldr pc, _fiq
>_undefined_instruction: .word undefined_instruction
>_software_interrupt: .word software_interrupt
>_prefetch_abort: .word prefetch_abort
>_data_abort: .word data_abort
>_not_used: .word not_used
>_irq: .word irq
>_fiq: .word fiq
推荐答案
如果你了解 reset 那么你就了解所有这些.
If you understand reset then you understand all of them.
当处理器复位时，硬件将 pc 设置为 0x0000，并通过获取 0x0000 处的指令开始执行.当一条未定义的指令被执行或试图被执行时，硬件通过将 pc 设置为 0x0004 并在 0x0004 处开始执行指令来做出响应.irq 中断，硬件完成它正在执行的指令，开始执行地址 0x0018 处的指令.等等.
When the processor is reset then hardware sets the pc to 0x0000 and starts executing by fetching the instruction at 0x0000. When an undefined instruction is executed or tries to be executed the hardware responds by setting the pc to 0x0004 and starts executing the instruction at 0x0004. irq interrupt, the hardware finishes the instruction it is executing starts executing the instruction at address 0x0018. and so on.
00000000 <_start>:
0: ea00000d b 3c <reset>
4: e59ff014 ldr pc, [pc, #20] ; 20 <_undefined_instruction>
8: e59ff014 ldr pc, [pc, #20] ; 24 <_software_interrupt>
c: e59ff014 ldr pc, [pc, #20] ; 28 <_prefetch_abort>
10: e59ff014 ldr pc, [pc, #20] ; 2c <_data_abort>
14: e59ff014 ldr pc, [pc, #20] ; 30 <_not_used>
18: e59ff014 ldr pc, [pc, #20] ; 34 <_irq>
1c: e59ff014 ldr pc, [pc, #20] ; 38 <_fiq>
00000020 <_undefined_instruction>:
20: 00000000 andeq r0, r0, r0
00000024 <_software_interrupt>:
24: 00000000 andeq r0, r0, r0
00000028 <_prefetch_abort>:
28: 00000000 andeq r0, r0, r0
0000002c <_data_abort>:
2c: 00000000 andeq r0, r0, r0
00000030 <_not_used>:
30: 00000000 andeq r0, r0, r0
00000034 <_irq>:
34: 00000000 andeq r0, r0, r0
00000038 <_fiq>:
38: 00000000 andeq r0, r0, r0
现在当然除了更改pc并从这些地址开始执行之外.硬件将保存机器的状态，必要时切换处理器模式，然后从向量表中的新地址开始执行.
Now of course in addition to changing the pc and starting execution from these addresses. The hardware will save the state of the machine, switch processor modes if necessary and then start executing at the new address from the vector table.
作为程序员，我们的工作是构建二进制文件，以便我们希望为这些指令中的每一个运行的指令位于正确的地址.硬件为每个位置提供一个字、一条指令.现在，如果您从不期望有任何这些异常，那么您不必在地址 0 处有一个分支，例如您可以直接启动程序，这些地址处的内存并没有什么神奇之处.如果你期望有这些异常，那么你有两种选择，指令是一个词，可以跳出后面的异常.一个是分支，另一个是负载电脑.各有利弊.
Our job as programmers is to build the binary such that the instructions we want to be run for each of these instructions is at the right address. The hardware provides one word, one instruction for each location. Now if you never expect to ever have any of these exceptions, you dont have to have a branch at address zero for example you can just have your program start, there is nothing magic about the memory at these addresses. If you expect to have these exceptions, then you have two choices for instructions that are one word and can jump out of the way of the exception that follows. One is a branch the other is a load pc. There are pros and cons to each.
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