ARM Cortex-A8 流水线是 13 级还是 14 级? [英] Is ARM Cortex-A8 pipeline 13 stage or 14 stage?

问题描述

如果您在 ARM :

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获取管道从 F0 阶段开始，在该阶段生成新的虚拟地址.这个地址可以是前一个分支预测提供的分支目标地址指令，或者如果本周期没有预测，将计算下一个地址从前一个周期中使用的获取地址开始.请注意，F0 Fetch 阶段不计为 13 阶段主整数管道中的官方阶段.这是因为 ARM 处理器流水线总是将指令缓存访问开始的阶段计为第一阶段.

If you see this popular pipeline diagram of ARM Cortex-A8 given in one of ARM presentations. It is clear that the instruction fetch stage takes 3 cycles, yet the first cycle is sort of discounted. But, why? Any thoughts?

Thank you...

解决方案

From somewhat hidden paper on Cortex A8:

The fetch pipeline begins with the F0 stage where a new virtual address is generated. This address can either be a branch target address provided by a branch prediction for a previous instruction, or if there is no prediction made this cycle, the next address will be calculated sequentially from the fetch address used in the previous cycle. Note that the F0 Fetch stage is not counted as an official stage in the 13 stage main integer pipeline. This is because ARM processor pipelines have always counted stages beginning with the Instruction Cache access as the first stage.

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