中断如何在多核 ARM cpu 上工作 [英] How do interrupts work on multicore ARM cpu

问题描述

这个问题已经在 x86 上得到了回答，但是我找不到太多关于 ARM MP cpu 的信息，比如 Cortex-A9、Cortex-A15 等等......

This question has already been answered for x86 however, I couldn't find much about ARM MP cpus like Cortex-A9, Cortex-A15 etc...

更重要的是，我想知道是否可以在没有任何配置等的情况下在非主 CPU 上引发中断.

More importantly i want to know if interrupts can be raised on non-primary cpu without any configuration etc.

我正在开发一个只处理主 cpu 的软件，因此我将其余部分置于 WFI 状态，但是我不知道中断如何在 MP arm cpu 上工作，主 cpu 是否有可能继续执行代码和一个次要 cpu 把它捡起来并跳转到向量表中的指令并执行该代码?

I am working on a software which deals only with the primary cpu hence i put the rest in WFI state however I am unaware of how interrupts work on the MP arm cpus, Is it possible that the main cpu continues executing code and one of the secondary cpu picks it up and jumps to the instruction in vector table and execute that code ?

顺便说一句，这是我用来将它们置于低功耗模式的代码

btw here is the code I'm using to put them to low power mode

    uint32_t reg;

    __asm__ volatile("mrc p15, 0, %0, c0, c0, 5" : "=r" (reg));
    reg &= 0xF;

    if(reg > 0)
        goto spin;

<code snipped>

spin:
    for(;;)
        cpu_idle(); // cpu_idle -> wfi

推荐答案

简短且实用的正确答案是，如果不在辅助核心上执行某些配置，就不可能实现您的要求...

The short and for practical purposes correct answer is that what you ask for is not possible without some configuration being performed on the secondary cores...

中断控制器架构在http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ihi0048b/index.html

要准备辅助内核以接收 IPI，您需要:

To prepare the secondary cores to receive IPIs, you need to:

• 启用 GIC 分发器(一次，用于整个系统)
• 启用 GIC CPU 接口(针对每个内核)
• 启用您想要接收的 IPI(针对每个内核)
• 为您想要接收的每个 IPI(针对每个核心)设置优先级
• 确保 CPU 接口中断优先级屏蔽寄存器(对于每个内核)的优先级设置为低于您在上面设置的中断优先级(更高的数字).
• 清除 CPSR I 位(针对每个内核)

如果您不打算实现中断处理程序，请跳过 I 位的清除.核心将从 WFI 出来并继续执行.这通常是您想要的系统启动操作.

If you don't intend to implement an interrupt handler, skip the clearing of the I-bit. The core will come out of WFI and continue executing. That is normally what you want for a system boot operation.

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