PC寄存器上的ARM LDR指令 [英] ARM LDR instruction on PC register

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问题描述

以下是我对故事的理解:

  • PC 寄存器保存指向下一条指令的指针
  • LDR 指令正在将第二个操作数的值加载到第一个操作数中(例如)

    LDR r0, [pc, 0x5678]

    相当于这个C代码"

    r0 = *(pc + 0x5678)

    它是使用基址偏移取消引用指针.

还有我的问题:

我找到了这个代码

<前>LDR PC, [PC,-4]

它被评论为猴子补丁等..

我如何理解这段代码

pc = *(pc - 4)

在这种情况下,pc"寄存器将取消引用前一条指令的地址,并将包含指令的机器代码"(不是指令地址),然后程序会跳转到那个无效地址继续执行,可能我们会得到Segmentation Fault".那么我缺少什么或不理解什么?



让我想到的是LDR指令中第二个操作数的括号.据我所知,在 x86 架构上括号已经取消引用指针,但我无法理解 ARM 架构中的含义.

<前>移动 r1, 0x5678添加 r1, pc移动 r0, [r1]

这段代码等价于吗?

<前>LDR r0, [pc, 0x5678]

解决方案

引自 ARM 指令集 文档 (ARM DDI 0029E) 的第 4.9.4 节:

<块引用>

当使用 R15 作为基址寄存器时,你必须记住它包含一个 8 字节的地址来自当前指令的地址.

因此该指令将加载位于当前指令之后 4 个字节的字,它希望包含一个有效地址.

Here how I understand the story:

  • PC register holds pointer to next instruction
  • LDR instruction is loading the value of second operand into first operand (for example)

    LDR r0, [pc, 0x5678]

    is equivalent to this "C code"

    r0 = *(pc + 0x5678)
    

    It's pointer dereferencing with base offset.

And my question:

I found this code

LDR PC, [PC,-4]

It's commented like monkey patching, etc..

How I understand this code

pc = *(pc - 4)

I this case "pc" register will dereference the address of previous instruction and will contain the "machine code" of instruction (not the address of instruction), and program will jump to that invalid address to continue execution, and probably we will get "Segmentation Fault". So what I'm missing or not understanding?



The thing that makes me to think is the brackets of second operand in LDR instruction. As I know on x86 architecture brackets are already dereferencing the pointer, but I can't understand the meaning in ARM architecture.

mov r1, 0x5678
add r1, pc
mov r0, [r1]

is this code equivalent to?

LDR r0, [pc, 0x5678]

解决方案

Quoting from section 4.9.4 of the ARM Instruction Set document (ARM DDI 0029E):

When using R15 as the base register you must remember it contains an address 8 bytes on from the address of the current instruction.

So that instruction will load the word located 4 bytes after the current instruction, which hopefully contains a valid address.

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