Makefile 条件包含 [英] Makefile conditional include

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本文介绍了Makefile 条件包含的处理方法,对大家解决问题具有一定的参考价值,需要的朋友们下面随着小编来一起学习吧!

问题描述

我正在尝试编写一个需要 ALSA 或 OSS 标头的应用程序.基本上,如果/etc/oss.conf 不存在,我想将定义传递给编译器,因为这可能意味着 soundcard.h 标头不存在(请随时纠正我,我还是新手与 OSS 合作).根据 OSS 文档,您可以像这样使用包含指令:

I'm trying to write an application that needs either ALSA or OSS headers. Basically, I want to pass a define to the compiler if /etc/oss.conf does not exist, since that probably means the soundcard.h header doesn't exist (feel free to correct me on that one, I'm still new to working with OSS). Per the OSS documentation, you would use the include directive like so:

include /etc/oss.conf
CFLAGS := -I$(OSSLIBDIR)/include/sys

一个问题.OSS 支持是可选的,所以我想检查头是否存在,如果存在,将定义传递给编译器.问题是,AFAIK 无法检查文件是否存在于 makefile 规则 之外.在规则内部,如果我使用 if 语句,出于某种原因,尝试设置 CFLAGS 不会改变它:

One problem. OSS support is optional, so I'd want to check if the header exists, and if does, pass a define to the compiler. The problem is, AFAIK there is no way to check if a file exists outside of a makefile rule. Inside the rule, if I use an if statement, for some reason, trying to set CFLAGS doesn't alter it:

test: $(objects)
    @if [ -f ${OSS_CONFIG} ]; then 
    . ${OSS_CONFIG}; 
    CFLAGS+=" -I${OSSLIBDIR} -DUSE_OSS"; 
    fi
    @echo ${CFLAGS}

(上面只是输出 CFLAGS 的原始值,即使 ${OSS_CONFIG} 存在.)这当然非常丑陋,我想知道是否有更清洁的方法做吧.或者我的处理方式是否会引发一场涉及小猫种族灭绝的全球性灾难性事件?

(The above just outputs the original value of CFLAGS, even if ${OSS_CONFIG} exists.) This is, of course, extremely ugly, and I'm wondering if there's a cleaner way to do it. Or is the way I'm going about this going to trigger a worldwide cataclysmic event involving the genocide of kittens?

哦,请不要告诉我使用 autoconf.

Oh, and please don't tell me to use autoconf.

推荐答案

一个建议:使用 -include (然后它不会警告+失败时退出).不过,我不知道我是否曾经完全使用过这种语法.

One suggest: use -include (then it won't warn + quit on failure). I don't know if I ever quite got this syntax to work myself, though.

另一个黑客可能是这样的:DUMMY_VAR := $(shell ... ) 来执行任意代码.我认为这更不可能奏效.

Another hack could be something along the lines of: DUMMY_VAR := $(shell ... ) to execute arbitrary code. I think this is even less likely to work.

除此之外,我认为这是可能的.最近在查类似的问题时,发现在makefile创建过程中,无法让make运行任意shell命令.

Other than that, I don' think this is possible. When I looked into a similar problem recently, I found that I can't get make to run arbitrary shell commands during the makefile creation process.

这篇关于Makefile 条件包含的文章就介绍到这了,希望我们推荐的答案对大家有所帮助,也希望大家多多支持IT屋!

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