如何计算跳转目标地址和分支目标地址? [英] How to Calculate Jump Target Address and Branch Target Address?

问题描述

我是汇编语言的新手.我正在阅读 MIPS 架构，但我坚持使用跳转目标地址和分支目标地址以及如何计算每个> 其中.

I am new to Assembly language. I was reading about MIPS architecture and I am stuck with Jump Target Address and Branch Target Address and how to calculate each of them.

推荐答案

(在下面的图表和文字中，PC是分支指令本身的地址.PC+4code>是分支指令本身的结束，也是分支延迟槽的开始.绝对跳转图中除外.)

(In the diagrams and text below, PC is the address of the branch instruction itself. PC+4 is the end of the branch instruction itself, and the start of the branch delay slot. Except in the absolute jump diagram.)

在 MIPS 中，分支指令只有 16 位偏移量来确定下一条指令.我们需要一个寄存器添加到这个 16 位值来确定下一条指令，这个寄存器实际上是由架构隐含的.它是 PC 寄存器，因为 PC 在取指周期内更新 (PC+4)，因此它保存下一条指令的地址.

In MIPS branch instruction has only 16 bits offset to determine next instruction. We need a register added to this 16 bit value to determine next instruction and this register is actually implied by architecture. It is PC register since PC gets updated (PC+4) during the fetch cycle so that it holds the address of the next instruction.

我们还将分支距离限制为从分支指令(之后的指令)到 -2^15 到 +2^15 - 1 指令.然而，这不是真正的问题，因为大多数分支机构无论如何都是本地的.

We also limit the branch distance to -2^15 to +2^15 - 1 instruction from the (instruction after the) branch instruction. However, this is not real issue since most branches are local anyway.

所以一步一步来:

• 对 16 位偏移值进行符号扩展以保留其值.
• 将结果值乘以 4.这背后的原因是，如果我们要分支某个地址，并且 PC 已经是字对齐的，那么立即数也必须是字对齐的.但是，使立即字对齐是没有意义的，因为我们将低两位强制设为 00 会浪费它们.
• 现在我们有一个 32 位的相对偏移量.将此值添加到 PC + 4，即您的分行地址.

对于跳转指令，MIPS 只有 26 位来确定跳转位置.跳转是相对于 MIPS 中的 PC 而言的.和branch一样，立即跳转值需要字对齐；因此，我们需要将 26 位地址乘以 4.

For Jump instruction MIPS has only 26 bits to determine Jump location. Jumps are relative to PC in MIPS. Like branch, immediate jump value needs to be word-aligned; therefore, we need to multiply 26 bit address with four.

再一步一步:

• 26 位值乘以 4.
• 由于我们相对于 PC+4 值跳转，因此将 PC+4 值的前四位连接到跳转地址的左侧.
• 结果地址是跳转值.

换句话说，将PC+4的低28位替换为取出指令的低26位左移2位.

In other words, replace the lower 28 bits of the PC + 4 with the lower 26 bits of the fetched instruction shifted left by 2 bits.

跳转是区域相关的分支延迟槽，不一定是分支本身.在上图中，PC 在跳转计算之前已经提前到了分支延迟槽.(在经典的 RISC 5 级流水线中，BD 是在跳转被解码的同一周期中获取的，因此PC+4 下一条指令地址已经可用于跳转和分支，并且相对于跳转自己的地址进行计算需要额外的工作来保存该地址.)

Jumps are region-relative to the branch-delay slot, not necessarily the branch itself. In the diagram above, PC has already advanced to the branch delay slot before the jump calculation. (In a classic-RISC 5 stage pipeline, the BD was fetched in the same cycle the jump is decoded, so that PC+4 next instruction address is already available for jumps as well as branches, and calculating relative to the jump's own address would have required extra work to save that address.)

来源:比尔肯大学 CS 224 课程幻灯片

Source: Bilkent University CS 224 Course Slides

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