NAND闪存编程:写入的粒度? [英] NAND flash programming: granularity of writes?

问题描述

有人知道现在的大型NAND闪存芯片具有写访问权限吗? 写入的最小粒度是多少?我这里有一个微控制器闪光灯 至少需要馈送1个字，最多4个字(即16位字) 立即写入状态机.我认为大(> 1 Gbit)闪烁 由于写入性能原因，此处的行为有所不同.

is someone in the kow about write accesses on nowadays large NAND flash chips? What is the minimal granularity for writes? I have a microcontroller flash here which requires at least 1 and at most 4 words (16-bit words that is) to be fed to the write statemachine at once. I think that the large (> 1 Gbit) flashes behave differently here for write performance reasons.

slarti

推荐答案

要清楚，要写入1位，您必须清除整个内存块，要写入0位，您只需要写入一个内存位置.您是在说一次写入(本质上是将某些位从1更改为0)还是在擦除块并重新写入块，以便可以使某些位从0变为a 1?

So to be clear, to write a 1 bit you have to clear a whole block of memory, to write a 0 bit you only have to write one memory location. Are you talking about a one time write (changing some of the bits from a 1 to a 0 essentially) or are you talking about erasing chunks and re-writing the chunk so that you can make some of the bits go from a 0 to a 1?

最容易知道的方法是只获取有问题零件的数据表，或从其他供应商那里获取少量数据表.我使用的最新版本是基于spi的，其内容类似于0x10000(65536)字节大小的擦除块.我称之为老式并行服务器，具有传统地址总线和数据总线的并行计算机，具有大约256字节或512字节的页面，但是这些不是较新的技术(nand).

The easiest way to know is to just get the data sheet for the part in question or for a handful of them from different vendors. The most recent one I used, which was spi based, had something like a 0x10000 (65536) byte sized erase block. The older parallel ones I call them, the ones with a traditional address bus and data bus, had something like 256 byte or 512 byte pages, but these were not the newer technologies (nand).

编辑

查看随机选择的三星文件，兆字节大小的存储器具有256和512字节的页面大小，但没有记录1和2 GB的页面大小(这是家族类型的数据表，而不是特定的零件数据表). MB大小的存储器的块大小在4K至16K范围内.

Looking at a randomly selected samsung document the megabyte sized memories had 256 and 512 byte page sizes, but the 1 and 2 gigabyte page sizes were not documented (it was family kind of datasheet and not a specific parts datasheet). The block sizes are in the 4K to 16K range for the MB sized memories.

这是从网页上剪下来的，我用谷歌搜索了nand flash页面的大小:

This is cut from a web page, I googled nand flash page size:

"25nm NAND的另一个主要变化是页面大小增加.在50nm和34nm时，IMFT的页面大小为4KB.在8GB设备上为25nm时，页面大小现在为8KB.块大小也增加了从128页到256页."

"The other major change to the 25nm NAND is an increase in the page size. At 50nm and 34nm, IMFT’s page size was 4KB. At 25nm on the 8GB device the page size is now 8KB. Block size has also gone up from 128 pages to 256 pages."

维基百科也提供了一些有关nand flash的有趣信息:

Wikipedia has some interesting information as well for nand flash:

虽然以页为单位进行读取和编程，但擦除只能以块为单位.NAND闪存的另一个限制是块中的数据只能顺序写入."

"While reading and programming is performed on a page basis, erasure can only be performed on a block basis. Another limitation of NAND flash is data in a block can only be written sequentially."

这听起来很糟糕，您正在寻找需要2MByte擦除的1写入.我用这些东西来引导嵌入式处理器，因此通常在蓝月亮左右擦除一次并写入一次，理想情况下，在产品生命周期内进行一次擦除和一次写入就可以完成一次写入.对于用作像磁盘这样的介质，这很痛苦.

So that sounds pretty bad, you are looking at writes of 1s requiring a 2MByte erase. I use these things for booting embedded processors so I typically erase once and write once every blue moon or so and ideally a single erase and single pass of writing and done for the life of the product. For use as a disk like media, this is painful.

还请注意，nand和/或较小的密度正在表现出读取干扰问题，其中过于频繁地读取位置会擦除附近的位置.对于像磁盘这样的磁盘来说，这可能不是问题，但是如果您想在nand闪存之外运行(执行)嵌入式处理器，那么您就不能启动，并使用最少的循环将一个小程序复制到ram，将其复制到ram，拥有这么小的程序/函数，就会有一个循环，将其余程序复制到ram中，而您用完了ram.

Also note nand and/or the smaller densities are exhibiting read-disturb issues where simply reading a location too often can erase near-by locations. Which may not be a problem for disk like media, but if you wanted to run (execute) an embedded processor out of nand flash, well you cant, you boot and with using minimal loops copy a small program to ram, branch to ram, have that small program/function have a loop that copies the rest of the program to ram and you run out of ram.

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