为什么有条件执行的指令在后面的ARM指令集不能present？ [英] Why are conditionally executed instructions not present in later ARM instruction sets?

问题描述

天真，有条件执行的指令看起来像一个伟大的想法在我身上。

Naively, conditionally executed instructions seem like a great idea to me.

当我读到更多关于ARM（ARM和类似）指令集（Thumb2，单核，AArch64）我发现他们都缺乏条件执行位。

As I read more about ARM (and ARM-like) instruction sets (Thumb2, Unicore, AArch64) I find that they all lack the bits for conditional execution.

为什么条件执行从每个这些失踪？

Why is conditional execution missing from each of these?

是有条件执行的时候出现错误，或者已经随之变化使得指令位的一个昂贵的浪费？

Was conditional execution a mistake at the time, or have subsequent changes made it an expensive waste of instruction bits?

推荐答案

一般说法是现代系统有更好的分支predictors和编译器是更先进的，让它们的指令编码空间成本是没有道理的。

General claim is modern systems have better branch predictors and compilers are much more advanced so their cost on instruction encoding space is not justified.

这是从 ARMv8指令集概述

在A64的指令集不包括predicated的概念或
  条件执行。 标杆表明，现代分支
  predictors工作的指导不够好，predicated执行
  不能提供足够的利益来证明其显著使用
  运code空间，并在其先进的实施成本
  实现。

The A64 instruction set does not include the concept of predicated or conditional execution. Benchmarking shows that modern branch predictors work well enough that predicated execution of instructions does not offer sufficient benefit to justify its significant use of opcode space, and its implementation cost in advanced implementations.

和继续

一个非常小的一套有条件的数据处理说明
  提供。这些指令无条件执行，但使用
  条件标志作为一个额外的输入指令。这样设置有
  被证明是在情况下条件分支有利
  predict不佳，或在其他低效的。

A very small set of "conditional data processing" instructions are provided. These instructions are unconditionally executed but use the condition flags as an extra input to the instruction. This set has been shown to be beneficial in situations where conditional branches predict poorly, or are otherwise inefficient.

另一篇标题为贸易条件执行更多的寄存器ARM处理器的声明：

...条件执行占用了precious指令空间
  条件是连接coded进入每一个4位条件code选择
  32位ARM指令。另外的，只有很小的比例
  说明实际条件化的现代嵌入式
  应用程序和条件执行甚至可能不会导致
  现代嵌入式处理器的性能提升。

... conditional execution takes up precious instruction space as conditions are encoded into a 4-bit condition code selector on every 32-bit ARM instruction. Besides, only small percentages of instructions are actually conditionalized in modern embedded applications, and conditional execution might not even lead to performance improvement on modern embedded processors.

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