是否可以在 makefile 中定义 C 宏? [英] Is it possible to define a C macro in a makefile?

问题描述

是否可以将#define VAR(在C程序中)的等价物放入makefile中，以便可以控制应该编译程序的哪一部分?

Is it possible to put the equivalent of #define VAR (in a C program) into a makefile, so that one can control which part of the program should be compiled?

推荐答案

根据 linux

-D name=definition
           The contents of definition are tokenized and processed as if they appeared during translation phase three in a #define directive.  In
           particular, the definition will be truncated by embedded newline characters.

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