如何禁用/启用STM32F107芯片上的中断? [英] How to disable/enable interrupts on a stm32f107 chip?
问题描述
我有一个ARM芯片STM32F107。我移植一个项目从IAR到GCC
I have an ARM stm32f107 chip. I'm porting a project from IAR to GCC
IAR提供以下功能启用和禁用中断:
IAR provides the following functions to enable and disable interrupts:
#define __disable_interrupt() ...
#define __enable_interrupt() ...
如何启用使用GCC我的芯片/禁用中断?
How do I enable / disable interrupt for my chip using GCC?
推荐答案
我不能回答,但ARM在的Coldfire同样的功能归结为置1 /清零中断优先级屏蔽寄存器在CPU中。将其设置为最高人数禁用/忽略所有,但非屏蔽,将其设置为0允许所有(因人而异)。
I can't answer for ARM but the same function in Coldfire boils down to setting/clearing the Interrupt Priority Level masking register in the CPU. Setting it to the highest number disables/ignores all but non-maskable, setting it to 0 enables all (YMMV).
值得关注的是它的方便回读时,禁用的价值和恢复时,有利,以确保堆叠中断不会突破对方:
Worth noting that it's handy to read-back the value when "disabling" and restore when "enabling" to ensure that stacked interrupts don't break each other:
ipl = DisableInts(); // Remember what the IPL was
<"Risky" code happens here>
EnableInts(ipl); // Restore value
这摆弄时中断口罩,这可能会导致虚假中断,或做不应该被打断的东西是很有用的。
This is useful when twiddling interrupt masks, which may cause spurious interrupts, or doing stuff that shouldn't be interrupted.
功能出来的:
uint8 DisableInts(void)
{
return(asm_set_ipl(7));
}
uint8 EnableInts(uint8 ipl)
{
return(asm_set_ipl(ipl));
}
这两者映射到该ASM的:
Both of which map to this asm:
asm_set_ipl:
_asm_set_ipl:
/* Modified for CW7.2! */
link A6,#-8
movem.l D6-D7,(SP)
move.l D0,D6 /* save argument */
move.w SR,D7 /* current sr */
move.l D7,D0 /* prepare return value */
andi.l #0x0700,D0 /* mask out IPL */
lsr.l #8,D0 /* IPL */
andi.l #0x07,D6 /* least significant three bits */
lsl.l #8,D6 /* move over to make mask */
andi.l #0x0000F8FF,D7 /* zero out current IPL */
or.l D6,D7 /* place new IPL in sr */
move.w D7,SR
movem.l (SP),D6-D7
//lea 8(SP),SP
unlk A6
rts
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