Makefile文件:没有规则,使目标 [英] Makefile: no rule to make target
问题描述
我一直在寻找这个网站的解决方案,并也尝试谷歌有一段时间了,但不知何故,我无法得到它的工作。
I was looking for a solution on this site and also tried google for some time now, but somehow I can't get it to work.
我的来源应该是在src目录和目标文件将在OBJ目录。现在,我尝试创建一个简单的makefie但我要么得到一个错误,没有规则,或者我不能使它工作使用的目录。
My source should be in the src directory and the object files would be in the obj directory. Now I try to create a simple makefie but I either get an error that there is no rule, or I can't make it work to use the directories.
CC = /usr/bin/gcc
CXXFLAGS = -O2 -g -Wall -fmessage-length=0
SRC:= nohupshd.cpp \
task.cpp
OBJ:= nohupshd.o \
task.o
OBJDIR:= obj
SRCDIR:= src
DEP:= src/task.h
LIBS:=
TARGET:= nohupshd
all: $(TARGET)
$(TARGET): $(OBJ)
$(CC) -o $(TARGET) $(OBJ) $(LIBS)
clean:
rm -f $(OBJ) $(TARGET)
变式1:
$(OBJDIR)/%.o: $(SRCDIR)/%.cpp
$(CC) -S $(SRCDIR)/$< -o $(OBJDIR)/$@
$(CC) -c $(SRCDIR)/$< -o $(OBJDIR)/$@
变1A:
%.o: %.cpp
$(CC) -S $(SRCDIR)/$< -o $(OBJDIR)/$@
$(CC) -c $(SRCDIR)/$< -o $(OBJDIR)/$@
当我使用这个模式,我总是得到一个错误,没有规则nohupshd.o打造。
When I use this pattern I always get an error that there is no rule for nohupshd.o to build.
变型2:
$(OBJ) : $(OBJDIR)/%.o: $(SRCDIR)/%.cpp
$(CC) -S $(SRCDIR)/$< -o $(OBJDIR)/$@
$(CC) -c $(SRCDIR)/$< -o $(OBJDIR)/$@
当我使用这个变量,我可以看到,它试图建立的,但我得到的错误说,文件的.o不适合目标模式。
When I use this variant, I can see that it tries to build, but I get errors saying that "file".o doesn't fit the target pattern.
的另一个问题是$&下;不给我的信号源名称。据几个网站应该,但我可以在输出中,没有什么看的,所以我怎么能解决这个问题?
Another issue is that "$<" doesn't give me the source name. According to several sites it should, but I can see in the output that there is nothing, so how can I fix this?
更新:
在此期间我的最新版本是这样的:
In the meantime my newest version looks like this:
$(OBJDIR)/$(OBJ) : $(OBJDIR)/%.o : $(SRCDIR)/%.cpp
$(CC) -S $< -o $(OBJDIR)/`basename $@ .o`.asm
$(CC) -c $< -o $@
这现在管理编制的第一个objectfile(nohupshd.o),但是当make试图做第二个文件失败再次说:目标task.o不匹配模式
This now manages to compile the first objectfile (nohupshd.o) but when make tries to do the second file it fails again saying: target 'task.o' doesn't match a pattern.
推荐答案
所以最后我发现了如何写这个makefile,为我的错误的exaplanation答案看我标记为正确答案的帖子:
So finally I found the answer on how to write this makefile, for an exaplanation of my mistakes look at the posting I marked as correct answer:
由此产生的Makefile看起来像这样,和我完整性它张贴在这里,包括头文件的依赖关系(去掉ASM的部分,如果你不需要'时间):
The resulting makefile looks like this, and for completeness I post it here including dependencies for header files (remove the ASM parts if you don't need 'em):
.SUFFIXES:
.SUFFIXES: .o .cpp
.SUFFIXES: .o .d
CC := g++
LNK:= ar
CXXFLAGS = -O2 -g -Wall -fmessage-length=0
OBJDIR:= obj
SRCDIR:= src
HDIR:= include
INCLUDE_PATHS:= -Iinclude -Iinclude/interfaces -Iinclude/support
CPP_FILES := propertyfile/propertyfile.cpp \
propertyfile/propertyitem.cpp \
propertyfile/propertyfactory.cpp
OBJ := $(patsubst %.cpp,$(OBJDIR)/%.o, $(CPP_FILES))
SRC := $(patsubst %.cpp,$(SRCDIR)/%.o, $(CPP_FILES))
ASM := $(patsubst %.cpp, $(OBJDIR)/$*.asm, $(CPP_FILES))
LIBS:=
TARGET:= libsupport.a
all: $(TARGET)
$(TARGET): $(OBJ)
@echo "Linking..."
@$(LNK) rvs $(TARGET) $(OBJ)
@cp $(TARGET) ../lib
@cp -r include ..
clean:
rm -f $(OBJ) $(ASM) $(TARGET)
-include $(patsubst %.cpp,$(OBJDIR)/%.d, $(CPP_FILES))
$(OBJDIR)/%.o: $(SRCDIR)/%.cpp $(OBJDIR)/%.d
@mkdir -p `dirname $@`
$(CC) $(CXXFLAGS) -S $< -o $(OBJDIR)/$*.asm $(INCLUDE_PATHS)
$(CC) $(CXXFLAGS) -c $< -o $@ $(INCLUDE_PATHS)
$(OBJDIR)/%.d: $(SRCDIR)/%.cpp
$(CC) $(CXXFLAGS) -MM -MT $@ -MF $(OBJDIR)/$*.d -c $< $(INCLUDE_PATHS)
我希望这可以帮助其他用户。我发现所有的例子都是要么简单的极端和独立,并没有列出多个文件规则的一部分,但并没有真正解释它是如何工作的,或非常复杂,我找不到它如何能帮助我。
I hope this helps other user. All examples that I found were either extremly simple and listed multiple files individually and not part of a rule, but didn't really explain how it works, or were so complicated that I couldn't find out how it can help me.
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