向右移位运算符的怪异的行为(1>> 32) [英] Weird behavior of right shift operator (1 >> 32)

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问题描述

我最近使用右移运营商面临着一个奇怪的行为。

以下程序:

 的#include< cstdio>
#包括LT&; cstdlib>
#包括LT&;&iostream的GT;
#包括LT&;&stdint.h GT;INT美孚(INT A,INT B)
{
   返回>> b:
}INT栏(uint64_t中A,INT B)
{
   返回>> b:
}INT主(INT ARGC,字符** argv的)
{
    性病::法院LT&;< 富(1,32):<<富(1,32)所述;&下;的std :: ENDL;
    性病::法院LT&;< 酒吧(1,32):<<杆(1,32)所述;&下;的std :: ENDL;
    性病::法院LT&;< 1>> 32:&所述;&下; (1 GT;> 32)&所述;&下;的std :: ENDL; //这里的警告
    性病::法院LT&;< (int)的1 GT;>(INT)32:&所述;&下; ((int)的1 GT;>(int)的32)所述;&下;的std :: ENDL; //这里的警告    返回EXIT_SUCCESS;
}

输出:

 富(1,32):1 //应该是0(但我想我想的东西)
杆(1,32):0
1>> 32:0
(int)的1 GT;> (INT)32:0

富()功能会发生什么?据我了解,之间它做什么,最后2行,唯一的区别是,最后两行是在编译时进行评估。为什么它会携手如果我使用一个64位的整数?

对此的灯光,将大大AP preciated!


当然有关,这里是 G ++ 给出:

 > G ++ -o测试TEST.CPP
TEST.CPP:在函数'主INT(INT,CHAR **):
TEST.CPP:20:36:警告:右移计数> =类型的宽度
TEST.CPP:21:56:警告:右移计数> =类型的宽度


解决方案

这是有可能的的 CPU 的实际计算

  A>> (二%32)

;同时,1 >> 32是一个常数前pression,所以的编译的将折叠不断在编译时,莫名其妙地给了0。

由于标准(C ++ 98派5.8 / 1)指出,


  

行为是不明确如果右操作数为负值,或者大于或等于促进左操作数的位长度。


存在具有富(1,32) 1&GT没有矛盾;> 32 给出不同的结果。

 

在另一方面,在杆64> 32,可以保证结果你提供的64位无符号价值的必须的1月2日 32 = 0。然而,如果你写

 栏(1,64);

您可能仍然获得1。


编辑:逻辑右移(SHR)的行为就像 A>> (二%32/64)在x86 / x86-64的(英特尔#253667,第4-404):


  

目标操作数可以是寄存器或内存位置。计数操作数可以是立即数或CL寄存器。的计数被掩蔽到5位(或6位,如果在64位模式,用于REX.W)。的计数范围是有限的,以0到31(或63,如果64位模式和REX.W使用)。提供了1计数一个特殊的运算code编码。


然而,在ARM(用于ARMv6和7,至少),逻辑右移(LSR)被实现为(ARMISA页A2-6)

 (位(N),位)LSR_C(比特(N)X,整数移)
    断言转变> 0;
    extended_x = ZeroExtend(X,Shift + N);
    结果= extended_x<移+ N-1:转向取代;
    carry_out = extended_x<移-1取代;
    回报(结果,carry_out);

在哪里(ARMISA页AppxB-13)

  ZeroExtend(X,I)=复制('0',I-LEN(X)):X

这保证≥32右移会产生为零。例如,当这code是在iPhone上运行,富(1,32)将给予0。

这些节目由≥32移32位整数是不可移植的。

I recently faced a strange behavior using the right-shift operator.

The following program:

#include <cstdio>
#include <cstdlib>
#include <iostream>
#include <stdint.h>

int foo(int a, int b)
{
   return a >> b;
}

int bar(uint64_t a, int b)
{
   return a >> b;
}

int main(int argc, char** argv)
{
    std::cout << "foo(1, 32): " << foo(1, 32) << std::endl;
    std::cout << "bar(1, 32): " << bar(1, 32) << std::endl;
    std::cout << "1 >> 32: " << (1 >> 32) << std::endl; //warning here
    std::cout << "(int)1 >> (int)32: " << ((int)1 >> (int)32) << std::endl; //warning here

    return EXIT_SUCCESS;
}

Outputs:

foo(1, 32): 1 // Should be 0 (but I guess I'm missing something)
bar(1, 32): 0
1 >> 32: 0
(int)1 >> (int)32: 0

What happens with the foo() function ? I understand that the only difference between what it does and the last 2 lines, is that the last two lines are evaluated at compile time. And why does it "work" if I use a 64 bits integer ?

Any lights regarding this will be greatly appreciated !


Surely related, here is what g++ gives:

> g++ -o test test.cpp
test.cpp: In function 'int main(int, char**)':
test.cpp:20:36: warning: right shift count >= width of type
test.cpp:21:56: warning: right shift count >= width of type

解决方案

It's likely the CPU is actually computing

a >> (b % 32)

in foo; meanwhile, the 1 >> 32 is a constant expression, so the compiler will fold the constant at compile-time, which somehow gives 0.

Since the standard (C++98 §5.8/1) states that

The behavior is undefined if the right operand is negative, or greater than or equal to the length in bits of the promoted left operand.

there is no contradiction having foo(1,32) and 1>>32 giving different results.

 

On the other hand, in bar you provided a 64-bit unsigned value, as 64 > 32 it is guaranteed the result must be 1 / 232 = 0. Nevertheless, if you write

bar(1, 64);

you may still get 1.


Edit: The logical right shift (SHR) behaves like a >> (b % 32/64) on x86/x86-64 (Intel #253667, Page 4-404):

The destination operand can be a register or a memory location. The count operand can be an immediate value or the CL register. The count is masked to 5 bits (or 6 bits if in 64-bit mode and REX.W is used). The count range is limited to 0 to 31 (or 63 if 64-bit mode and REX.W is used). A special opcode encoding is provided for a count of 1.

However, on ARM (armv6&7, at least), the logical right-shift (LSR) is implemented as (ARMISA Page A2-6)

(bits(N), bit) LSR_C(bits(N) x, integer shift)
    assert shift > 0;
    extended_x = ZeroExtend(x, shift+N);
    result = extended_x<shift+N-1:shift>;
    carry_out = extended_x<shift-1>;
    return (result, carry_out);

where (ARMISA Page AppxB-13)

ZeroExtend(x,i) = Replicate('0', i-Len(x)) : x

This guarantees a right shift of ≥32 will produce zero. For example, when this code is run on the iPhone, foo(1,32) will give 0.

These shows shifting a 32-bit integer by ≥32 is non-portable.

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