了解CPU缓存和缓存行 [英] Understanding CPU cache and cache line

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问题描述

我想了解CPU缓存的运行。比方说,我们有这个配置(作为一个例子)。

I am trying to understand how CPU cache is operating. Lets say we have this configuration (as an example).


  • 缓存大小为1024字节

  • 缓存行32字节

  • 三十二分之一千零二十四= 32的高速缓存行在一起。

  • 辛格运河缓存行可以存储32/4 = 8整数。

1)根据标签的这些配置长度应当是32-5 = 27位和索引5比特(用于高速缓存行的每个字节2 ^ 5 = 32个地址)的大小。

1) According to these configuration length of tag should be 32-5=27 bits, and size of index 5 bits (2^5 = 32 addresses for each byte in cache line).

如果总缓存大小为1024,并有32个高速缓存行,这里是标签+索引存储? (还有一个4 * 32 = 128个字节。)它是否表示高速缓存的实际大小为1024 + 128 = 1152?

If total cache size is 1024 and there are 32 cache lines, where is tags+indexes are stored? (There is another 4*32 = 128 bytes.) Does it means that actual size of the cache is 1024+128 = 1152?

2)如果高速缓冲存储器行是在本实施例中32字节,这意味着32字节高速缓存得到复制whenerever CPU需要从RAM获取新的字节。我说得对假设将其ADRESS决定请求字节的高速缓存线的位置?

2) If cache line is 32 bytes in this example, this means that 32 bytes getting copied in cache whenerever CPU need to get new byte from RAM. Am I right to assume that cache line position of the requested byte will be determined by its adress?

这是我的意思:如果CPU在请求的字节[FF FF 00 08] ,那么可用的高速缓存线将充满字节从 [FF FF 00 00] [FF FF 00 1F] 。而我们requseted单字节会在位置 [08]

This is what I mean: if CPU requested byte at [FF FF 00 08], then available cache line will be filled with bytes from [FF FF 00 00] to [FF FF 00 1F]. And our requseted single byte will be at position [08].

3)previous说法是正确的,这是否意味着该用于索引5位,在技术上没有必要,因为所有32个字节的缓存行呢?

3) If previous statement is correct, does it mean that 5 bits that used for index, are technically not needed since all 32 bytes are in the cache line anyway?

请让我知道如果我有什么不对。
谢谢

Please let me know if I got something wrong. Thanks

推荐答案

一个高速缓存由数据和标签RAM,安排访问时间与效率和物理布局妥协。你错过了一个重要的属性:方法(套)数。你很少有1路高速缓存,是因为他们用简单的模式进行病理严重。总之:

A cache consists of data and tag RAM, arranged as a compromise of access time vs efficiency and physical layout. You're missing an important stat: number of ways (sets). You rarely have 1-way caches, because they perform pathologically badly with simple patterns. Anyway:

1)是,标签需要额外的空间。这是设计妥协的一部分 - 你不希望它是总面积的很大一部分,为什么行大小是不只是1个字节或1个字。此外,对于一个指数的所有标签被同时访问,并且,如果有大量的方法可以影响效率和布局。大小比你估计稍大。还有平时也有一些额外的比特位,以纪念有效性,有时甚至暗示。更多的方式和小行需要通过标签占据较大的比例,所以一般线大(32+字节)的方式是小(4-16)。

1) Yes, tags take extra space. This is part of the design compromise - you don't want it to be a large fraction of the total area, and why line size isn't just 1 byte or 1 word. Also, all tags for an index are simultaneously accessed, and that can affect efficiency and layout if there's a large number of ways. The size is slightly bigger than your estimate. There's usually also a few bits extra bits to mark validity and sometimes hints. More ways and smaller lines needs a larger fraction taken up by tags, so generally lines are large (32+ bytes) and ways are small (4-16).

2)是。一些高速缓存也做了一个临界字第一的获取,在那里他们开始导致行填充的字,则取休息。这减少了周期在CPU正在等待它实际上要求的数据的数量。一些缓存将写入直通,而不是分配行,如果你在写,这避免了先阅读整个高速缓存行思念,在写入之前(这并不总是一个双赢)。

2) Yes. Some caches also do a "critical word first" fetch, where they start with the word that caused the line fill, then fetch the rest. This reduces the number of cycles the CPU is waiting for the data it actually asked for. Some caches will "write thru" and not allocate a line if you miss on a write, which avoids having to read the entire cache line first, before writing to it (this isn't always a win).

3)作为不是在需要的时候,以匹配的高速缓存行中的标记将不会存储的低5位。他们只是索引到各行。

3) The tags won't store the lower 5 bits as they're not needed to match a cache line. They just index into individual lines.

维基百科有一个pretty好,如果在缓存有点激烈,写起来: HTTP://en.wikipedia .ORG /维基/ CPU_cache - 见实施。有怎样的数据和标签被分割图。我,我想每个人都应该学习这个东西,因为你的时候,你知道什么是底层机器实际上是能够真正能提高code的性能。

Wikipedia has a pretty good, if a bit intense, write-up on caches: http://en.wikipedia.org/wiki/CPU_cache - see "Implementation". There's a diagram of how data and tags are split. Me, I think everyone should learn this stuff because you really can improve performance of code when you know what the underlying machine is actually capable of.

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