Makefile:交叉组合的目标 [英] Makefile: Targets for Crosscombinations

问题描述

我有2种文件类型.脚本和数据集.我想编写一个makefile来运行每个数据集的每个脚本. 我的想法是为每个输出创建一个目标，其中目标的名称包含脚本和模型名称.这些目标将匹配目标模式"规则(类型:some_folder/％.eval).现在，目标模式"规则将需要从其名称中找出需要哪些文件.但这似乎是一项艰巨的工作.

I have 2 types of files. Scripts and datasets. I want to write a makefile to run each script with each dataset. My idea was to create a target for each output, where the target has a name containing the script and the model name. These targets would match a "target-pattern"-rule (of type: some_folder/%.eval). Now the "target-pattern"-rule would need to figure out from its name which files are needed. But this seems to be a hard job.

有没有更好，更优雅的方式?

Is there a better, more elegant way?

示例:

文件:ScriptA，ScriptB，InputA，InputB

Files: ScriptA, ScriptB, InputA, InputB

目标/输出文件:InputA_ScriptA，InputA_ScriptB，InputB_ScriptA，InputB_ScriptB

Targets/Outputfiles: InputA_ScriptA, InputA_ScriptB, InputB_ScriptA, InputB_ScriptB

# generate all combinations
RT_HW = $(foreach script,$(RT_SCRIPT_HW),$(foreach input, $(RT_INPUTS), $(input)_$(script)))

$(SANDBOX)%.eval: <requires Script X and input X>

推荐答案

您遇到了Make的主要缺点之一:通配符不是很好.

You've run into one of the major shortcomings of Make: it isn't very good with wildcards.

您可以通过 eval生成规则来获得所需的效果，或者遍历两个变量:

You can get the effect you want by generating rules with eval, either by iterating over both variables:

define template
$(1)_$(2).eval: $(1) $(2)
    @echo target is $$@
    @echo running $(2) on $(1)
endef

$(foreach script,$(RT_SCRIPT_HW),$(foreach input, $(RT_INPUTS), $(eval $(call template,$(input),$(script)))))

或通过生成模式规则，仅对一个规则进行迭代，例如输入:

or by generating pattern rules, iterating over only one, such as the input:

define template
$(1)_%.eval: $(1) %
    @echo target is $$@
    @echo running $$* on $(1)
endef

$(foreach input, $(RT_INPUTS), $(eval $(call template,$(input))))

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