makefile目标特定的文件 [英] makefile target-specific files

问题描述

我正在尝试制作一个可以编译两个不同文件集的单个makefile文件.这可能吗?

I'm trying to make a single makefile file that compiles two different set of files. Is this posible?

到目前为止，我尝试过的是:

What I tried so far is:

target1: OBJ = foo1.o foo2.o  
target1: application

target2: OBJ = foo3.o foo4.o
target2: application

application: $(OBJ)
    $(LD) $(OBJ)

发生的情况是，使用正确的参数调用了LD，但是make从未真正检查过依赖项，因此，从不执行将.c文件编译为.o的隐式规则，因此链接器将失败:

What happens is that LD is called with the correct parameters but make never actually checks the dependencies therefore the implicit rules that compile .c files to .o are never executed so linker fails with:

ld: cannot find foo1.o: No such file or directory
ld: cannot find foo2.o: No such file or directory

正确的方法是什么?

推荐答案

例如，您可以使用它(考虑到您不会一次调用具有多个目标的make):

You could go with this for instance (considering you won't call make with multiple target at once):

OBJ := foo1.o foo2.o

ifeq "$(MAKECMDGOALS)" "target2"
OBJ := foo3.o foo4.o
endif

target1 target2: application

application: $(OBJ)
    $(LD) $^

这篇关于makefile目标特定的文件的文章就介绍到这了，希望我们推荐的答案对大家有所帮助，也希望大家多多支持IT屋！