l1缓存和l2缓存有什么区别？ [英] what is the difference between l1 cache and l2 cache?

问题描述

我知道l1和l2缓存是多级缓存中的级别。

我想知道每个级别的缓存放在何处，允许的最大缓存级别数是多少？

I know that l1 and l2 caches are levels in multi-level cache.
I would like to know where each level cache is placed, and what is the maximum number of cache levels allowed?

推荐答案

这两个都取决于CPU。有的CPU根本没有缓存，有的CPU的裸片上有L1缓存，而在同一芯片上甚至在单独的芯片上的单独裸片上有L2缓存，或者有同时具有L1和L2缓存的CPU

Both of these depend on the CPU. There are CPUs which have no cache at all, there are CPUs which have the L1 cache on die and the L2 cache on a separate die on the same chip or even on a separate chip, or there are CPUs which have both L1 and L2 cache on the same die as the CPU core.

有多核，多芯片CPU，其中每个内核在芯片上都拥有自己的L1高速缓存，一个内核的4个内核多核芯片共享一个L2高速缓存，该L2高速缓存位于芯片上，但位于单独的裸片上，两个芯片共享一个L3高速缓存，该L3高速缓存位于同一芯片上，但处于同一封装中。有时，也有所谓的 CPU书，其中包含多个芯片封装，这些芯片封装可能有也可能没有自己的共享缓存，而后者将是L4缓存。

There are multi-core, multi-chip CPUs where each core has its own L1 cache on die, the 4 cores of one multi-core chip share an L2 cache that is on chip, but on a separate die, and the 2 chips share an L3 cache that is on a separate chip, but in the same package. Sometimes, there are also so-called CPU books which contain multiple chip packages, which might or might not have their own shared cache, which would then be an L4 cache.

当然，多核芯片不必共享其二级缓存，它们也可以具有专用的二级缓存。

Of course, multi-core chips don't have to share their L2 cache, they can also have private L2 caches.

显而易见，某个高速缓存是什么级别，或者甚至一个RAM根本不是一个高速缓存。

And it's not always obvious, what level a certain cache is, or even whether or not a piece of RAM is a cache at all.

例如，在后来的Intel 80486处理器上，是芯片上的一级缓存和主板上的二级缓存。但是随后AMD推出了与插槽兼容的CPU，该芯片上同时具有L1和L2缓存。因此，主板上完全相同的缓存芯片是L2或L3缓存，具体取决于您使用的CPU类型。

For example, on later Intel 80486 processors, there was an L1 cache on the chip and an L2 cache on the motherboard. But then AMD came out with a socket-compatible CPU that had both an L1 and L2 cache on the chip. So, the exact same cache chip on the motherboard was either an L2 or L3 cache, depending on what kind of CPU you used.

在Cell BE CPU上，SPE每个都有256千字节的RAM。除了该RAM与典型的L2缓存具有相同的大小和速度之外，并且由于SPE没有其他任何缓存，因此您也可以将其视为缓存。但是，缓存通常由CPU自动管理，而RAM通常由用户程序，语言运行时或OS（而不是CPU）管理。那么，这是RAM还是缓存？事实证明，为了获得最佳性能，您应该不将其视为RAM，而应将其更多地视为软件控制的缓存。

On the Cell BE CPU, the SPEs have 256 KiByte of RAM each. Except that this RAM has about the same size and the same speed as a typical L2 cache, and since the SPEs don't have any other caches, you could also view this as a cache. However, caches are normally managed automatically by the CPU, whereas RAM is typically managed by the user program, the language runtime or the OS, not the CPU. So, is this RAM or a cache? It turns out that, in order to achieve best performance, you should really not view this as RAM, but more as a software-controlled cache.

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